Issued Patents All Time
Showing 276–300 of 309 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8617961 | Post-gate isolation area formation for fin field effect transistor device | Balasubramanian S. Haran, Sanjay C. Mehta | 2013-12-31 |
| 8604539 | Bulk fin-field effect transistors with well defined isolation | Kangguo Cheng, Balasubramanian S. Haran, Shom Ponoth, Tenko Yamashita | 2013-12-10 |
| 8604546 | Reducing gate resistance in nonplanar multi-gate transistor | Andres Bryant, Gen Tsutsui, Chun-Chen Yeh | 2013-12-10 |
| 8592263 | FinFET diode with increased junction area | Kangguo Cheng, Balasubramanian S. Haran, Shom Ponoth, Tenko Yamashita | 2013-11-26 |
| 8592290 | Cut-very-last dual-EPI flow | Veeraraghavan S. Basker, Huiming Bu, Kangguo Cheng, Balasubramanian S. Haran, Nicolas Loubet +3 more | 2013-11-26 |
| 8581320 | MOS capacitors with a finfet process | Kangguo Cheng, Balasubramanian S. Haran, Shom Ponoth, Tenko Yamashita | 2013-11-12 |
| 8569125 | FinFET with improved gate planarity | Kangguo Cheng, Balasubramanian S. Haran, Shom Ponoth, Soon-Cheon Seo, Tenko Yamashita | 2013-10-29 |
| 8569152 | Cut-very-last dual-epi flow | Veeraraghavan S. Basker, Huiming Bu, Kangguo Cheng, Balasubramanian S. Haran, Nicolas Loubet +3 more | 2013-10-29 |
| 8455313 | Method for fabricating finFET with merged fins and vertical silicide | Veeraraghavan S. Basker, Andres Bryant, Huiming Bu, Wilfried E. Haensch, Effendi Leobandung +3 more | 2013-06-04 |
| 8445334 | SOI FinFET with recessed merged Fins and liner for enhanced stress coupling | Veeraraghavan S. Basker, Huiming Bu, Effendi Leobandung, Tenko Yamashita, Chun-Chen Yeh | 2013-05-21 |
| 8432002 | Method and structure for low resistive source and drain regions in a replacement metal gate process flow | Balasubramanian S. Haran, Kangguo Cheng, Shom Ponoth, Tenko Yamashita | 2013-04-30 |
| 8420459 | Bulk fin-field effect transistors with well defined isolation | Kangguo Cheng, Balasubramanian S. Haran, Shom Ponoth, Tenko Yamashita | 2013-04-16 |
| 8298948 | Capping of copper interconnect lines in integrated circuit devices | Griselda Bonilla, Kaushik Chanda, Ronald G. Filippi, Stephan Grunow, David L. Rath +3 more | 2012-10-30 |
| 8084311 | Method of forming replacement metal gate with borderless contact and structure thereof | David V. Horak, Su Chen Fan | 2011-12-27 |
| 8056039 | Interconnect structure for integrated circuits having improved electromigration characteristics | Kaushik Chanda, Ronald G. Filippi, Stephan Grunow, Chao-Kun Hu, Sujatha Sankaran +1 more | 2011-11-08 |
| 7968456 | Method of forming an embedded barrier layer for protection from chemical mechanical polishing process | Paul S. McLaughlin, Sujatha Sankaran | 2011-06-28 |
| 7964966 | Via gouged interconnect structure and method of fabricating same | Chih-Chao Yang, Daniel C. Edelstein | 2011-06-21 |
| 7943453 | CMOS devices with different metals in gate electrodes using spin on low-k material as hard mask | Bernd Kastenmeier, Byoung Hun Lee, Naim Moumen | 2011-05-17 |
| 7902061 | Interconnect structures with encasing cap and methods of making thereof | Lawrence A. Clevenger, Timothy J. Dalton, Louis C. Hsu, Carl Radens, Keith Kwong Hon Wong +1 more | 2011-03-08 |
| 7816271 | Methods for forming contacts for dual stress liner CMOS semiconductor devices | Kyoung-Woo Lee, Ja-Hum Ku, Wanjae Park, Chong-Kwang Chang | 2010-10-19 |
| 7776737 | Reliability of wide interconnects | Griselda Bonilla, Kaushik Chanda, Ronald G. Filippi, Stephan Grunow, Sujatha Sankaran +1 more | 2010-08-17 |
| 7737528 | Structure and method of forming electrically blown metal fuses for integrated circuits | Griselda Bonilla, Kaushik Chanda, Ronald G. Filippi, Jeffrey P. Gambino, Stephan Grunow +3 more | 2010-06-15 |
| 7671362 | Test structure for determining optimal seed and liner layer thicknesses for dual damascene processing | Tibor Bolom, Kaushik Chanda, Ronald G. Filippi, Stephan Grunow, Paul S. McLaughlin +3 more | 2010-03-02 |
| 7645700 | Dry etchback of interconnect contacts | William Brearley, Stephen E. Greco, Sujatha Sankaran | 2010-01-12 |
| 7488677 | Interconnect structures with encasing cap and methods of making thereof | Kwong Hon Wong, Louis C. Hsu, Timothy J. Dalton, Carol Radens, Chih-Chao Yang +1 more | 2009-02-10 |