Issued Patents All Time
Showing 126–150 of 183 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10283620 | Approach to control over-etching of bottom spacers in vertical fin field effect transistor devices | Hemanth Jagannathan, Paul C. Jamison, Choonghyun Lee | 2019-05-07 |
| 10276687 | Formation of self-aligned bottom spacer for vertical transistors | Hemanth Jagannathan, Choonghyun Lee, Shogo Mochizuki | 2019-04-30 |
| 10276452 | Low undercut N-P work function metal patterning in nanosheet replacement metal gate process | Indira Seshadri, Ekmini Anuja De Silva, Jing Guo, Romain Lallement, Zhenxing Bi +1 more | 2019-04-30 |
| 10263098 | Threshold voltage modulation through channel length adjustment | Dechao Guo, Derrick Liu, Huimei Zhou | 2019-04-16 |
| 10256159 | Formation of common interfacial layer on Si/SiGe dual channel complementary metal oxide semiconductor device | Hemanth Jagannathan, Choonghyun Lee, Shogo Mochizuki | 2019-04-09 |
| 10249543 | Field effect transistor stack with tunable work function | Siddarth A. Krishnan, Unoh Kwon, Vijay Narayanan | 2019-04-02 |
| 10242919 | Vertical transport fin field effect transistors having different channel lengths | Choonghyun Lee, Shogo Mochizuki, Chun Wing Yeung | 2019-03-26 |
| 10243055 | Shared metal gate stack with tunable work function | Siddarth A. Krishnan, Unoh Kwon, Vijay Narayanan | 2019-03-26 |
| 10236219 | VFET metal gate patterning for vertical transport field effect transistor | Brent A. Anderson, Kangguo Cheng, Hemanth Jagannathan, Choonghyun Lee, Junli Wang | 2019-03-19 |
| 10224419 | Threshold voltage modulation through channel length adjustment | Dechao Guo, Derrick Liu, Huimei Zhou | 2019-03-05 |
| 10204828 | Enabling low resistance gates and contacts integrated with bilayer dielectrics | Benjamin D. Briggs, Lawrence A. Clevenger, Koichi Motoyama, Cornelius Brown Peethala, Michael Rizzolo +1 more | 2019-02-12 |
| 10170477 | Forming MOSFET structures with work function modification | Gauri Karve, Derrick Liu, Robert R. Robison, Gen Tsutsui, Reinaldo Vega +1 more | 2019-01-01 |
| 10170593 | Threshold voltage modulation through channel length adjustment | Dechao Guo, Derrick Liu, Huimei Zhou | 2019-01-01 |
| 10170640 | FinFET transistor gate and epitaxy formation | Zhenxing Bi, Kangguo Cheng, Zheng Xu | 2019-01-01 |
| 10157923 | Vertical transport transistors with equal gate stack thicknesses | Zhenxing Bi, Choonghyun Lee, Zheng Xu | 2018-12-18 |
| 10147725 | Forming MOSFET structures with work function modification | Gauri Karve, Derrick Liu, Robert R. Robison, Gen Tsutsui, Reinaldo Vega +1 more | 2018-12-04 |
| 10134642 | Semiconductor device and method of forming the semiconductor device | Brent A. Anderson, Paul C. Jamison, Choonghyun Lee | 2018-11-20 |
| 10128372 | Bottom contact resistance reduction on VFET | Choonghyun Lee, Shogo Mochizuki, Hemanth Jagannathan | 2018-11-13 |
| 10128347 | Gate-all-around field effect transistor having multiple threshold voltages | Michael A. Guillorn, Terence B. Hook, Robert R. Robison, Reinaldo Vega, Tenko Yamashita | 2018-11-13 |
| 10109722 | Etch-resistant spacer formation on gate structure | Ruilong Xie, Zhenxing Bi, Pietro Montanini, Eric R. Miller, Balasubramanian Pranatharthiharan +2 more | 2018-10-23 |
| 10103147 | Vertical transport transistors with equal gate stack thicknesses | Zhenxing Bi, Choonghyun Lee, Zheng Xu | 2018-10-16 |
| 10084055 | Uniform threshold voltage for nanosheet devices | Hemanth Jagannathan, Paul C. Jamison, Choonghyun Lee, Vijay Narayanan, Koji Watanabe | 2018-09-25 |
| 10084082 | Bottom contact resistance reduction on VFET | Choonghyun Lee, Shogo Mochizuki, Hemanth Jagannathan | 2018-09-25 |
| 10079182 | Field effect transistor gate stack | Siddarth A. Krishnan, Unoh Kwon, Vijay Narayanan | 2018-09-18 |
| 10074574 | Integrated circuit with replacement gate stacks and method of forming same | Siddarth A. Krishnan | 2018-09-11 |