Issued Patents All Time
Showing 101–125 of 255 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9748359 | Vertical transistor bottom spacer formation | Sanjay C. Mehta, Shogo Mochizuki, Alexander Reznicek | 2017-08-29 |
| 9702930 | Semiconductor wafer probing system including pressure sensing and control unit | Robert D. Edwards, Louis V. Medina, Tso-Hui Ting, Ping-Chuan Wang, Yongchun Xin | 2017-07-11 |
| 9679810 | Integrated circuit having improved electromigration performance and method of forming same | Joyeeta Nag, Shishir Ray, Andrew H. Simon, Siddarth A. Krishnan, Michael P. Chudzik | 2017-06-13 |
| 9620416 | Fin field effect transistor structure and method to form defect free merged source and drain epitaxy for low external resistance | Veeraraghavan S. Basker, Shogo Mochizuki, Alexander Reznicek | 2017-04-11 |
| 9620396 | Laser anneal of buried metallic interconnects including through silicon vias | Andrew J. Martin, Joyeeta Nag | 2017-04-11 |
| 9613870 | Gate stack formed with interrupted deposition processes and laser annealing | Takashi Ando, Aritra Dasgupta, Balaji Kannan, Unoh Kwon | 2017-04-04 |
| 9613866 | Gate stack formed with interrupted deposition processes and laser annealing | Takashi Ando, Aritra Dasgupta, Balaji Kannan, Unoh Kwon | 2017-04-04 |
| 9570298 | Localized elastic strain relaxed buffer | Veeraraghavan S. Basker, Shogo Mochizuki, Alexander Reznicek | 2017-02-14 |
| 9524930 | Configurable interposer | Yunsheng Song, Tso-Hui Ting, Ping-Chuan Wang | 2016-12-20 |
| 9455185 | Laser anneal of buried metallic interconnects including through silicon vias | Andrew J. Martin, Joyeeta Nag | 2016-09-27 |
| 9449921 | Voidless contact metal structures | Veeraraghavan S. Basker, Nicolas L. Breil, Shogo Mochizuki, Alexander Reznicek | 2016-09-20 |
| 9451684 | Dual pulse driven extreme ultraviolet (EUV) radiation source method | Daniel A. Corliss, Sadanand V. Deshpande, Veeresh V. Deshpande, Sivarama Krishnan | 2016-09-20 |
| 9450069 | Silicon germanium heterojunction bipolar transistor structure and method | Rajendran Krishnasamy, Kathryn T. Schonenberg | 2016-09-20 |
| 9431534 | Asymmetric field effect transistor cap layer | Nicolas L. Breil | 2016-08-30 |
| 9412658 | Constrained nanosecond laser anneal of metal interconnect structures | Siddarth A. Krishnan, Joyeeta Nag, Andrew H. Simon, Shishir Ray | 2016-08-09 |
| 9378952 | Tall relaxed high percentage silicon germanium fins on insulator | Veeraraghavan S. Basker, Shogo Mochizuki, Alexander Reznicek | 2016-06-28 |
| 9360858 | Alignment data based process control system | Christopher P. Ausschnitt, Timothy A. Brunner, Allen H. Gabor, Vinayan C. Menon | 2016-06-07 |
| 9354252 | Pressure sensing and control for semiconductor wafer probing | Robert D. Edwards, Louis V. Medina, Tso-Hui Ting, Ping-Chuan Wang, Yongchun Xin | 2016-05-31 |
| 9349661 | Wafer thinning endpoint detection for TSV technology | Hanyi Ding, Ping-Chuan Wang, Lin Zhou | 2016-05-24 |
| 9335759 | Optimization of a laser anneal beam path for maximizing chip yield | Nicolas L. Breil, Keith Kwong Hon Wong | 2016-05-10 |
| 9301381 | Dual pulse driven extreme ultraviolet (EUV) radiation source utilizing a droplet comprising a metal core with dual concentric shells of buffer gas | Daniel A. Corliss, Sadanand V. Deshpande, Veeresh V. Deshpande, Sivarama Krishnan | 2016-03-29 |
| 9275866 | Gas cluster reactor for anisotropic film growth | Ahmet S. Ozcan | 2016-03-01 |
| 9151781 | Yield enhancement for stacked chips through rotationally-connecting-interposer | Muthukumarasamy Karthikeyan, Yunsheng Song, Tso-Hui Ting, Richard P. Volant, Ping-Chuan Wang | 2015-10-06 |
| 9093424 | Dual silicide integration with laser annealing | Nicolas L. Breil | 2015-07-28 |
| 9059316 | Structure and method for mobility enhanced MOSFETs with unalloyed silicide | Yaocheng Liu, Dureseti Chidambarrao, Judson R. Holt, Renee T. Mo, Kern Rim | 2015-06-16 |