Issued Patents All Time
Showing 1–25 of 45 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12356705 | Electrical contact cavity structure and methods of forming the same | Lisa McGill, Manoj Vellaikal, Bocheng Cao, Pei Liu, Avgerinos V. Gelatos | 2025-07-08 |
| 12327761 | Void-free contact trench fill in gate-all-around FET architecture | Byeong-Chan Lee, Benjamin Colombeau | 2025-06-10 |
| 12284803 | System and methods for dram contact formation | Fredrick Fishburn, Byeong-Chan Lee | 2025-04-22 |
| 12113020 | Formation of metal vias on metal lines | Ryan Smith, Kai Wu | 2024-10-08 |
| 11978635 | Silicide films through selective deposition | Swaminathan Srinivasan, Abhijit Basu Mallick | 2024-05-07 |
| 11605741 | Methods of forming doped silicide power devices | Joshua S. Holt, Lan Yu, Tyler Sherwood, Archana Kumar, Siddarth A. Krishnan | 2023-03-14 |
| 11362275 | Annealing processes for memory devices | Siddarth A. Krishnan, Shashank Sharma, Ria Someshwar, Kai Ng, Deepak Kamalanathan | 2022-06-14 |
| 11088280 | Transistor and method of forming same | Veeraraghavan S. Basker, Oleg Gluschenkov, Shogo Mochizuki, Alexander Reznicek | 2021-08-10 |
| 11069809 | Soi FinFET fins with recessed fins and epitaxy in source drain region | Alexander Reznicek, Shogo Mochizuki, Veeraraghavan S. Basker, Oleg Gluschenkov | 2021-07-20 |
| 10950450 | Silicide films through selective deposition | Swaminathan Srinivasan, Abhijit Basu Mallick | 2021-03-16 |
| 10922809 | Method for detecting voids and an inspection system | Dror Shemesh, Vadim Kuchik | 2021-02-16 |
| 10707167 | Contacts to semiconductor substrate and methods of forming same | Emre Alptekin, Christian Lavoie, Ahmet S. Ozcan, Kathryn T. Schonenberg | 2020-07-07 |
| 10607841 | Silicide films through selective deposition | Swaminathan Srinivasan, Abhijit Basu Mallick | 2020-03-31 |
| 10096609 | Modified tungsten silicon | Domingo A. Ferrer, Keith Kwong Hon Wong | 2018-10-09 |
| 10068920 | Silicon germanium fins on insulator formed by lateral recrystallization | Alexander Reznicek, Veeraraghavan S. Basker, Shogo Mochizuki, Oleg Gluschenkov | 2018-09-04 |
| 9997407 | Voidless contact metal structures | Veeraraghavan S. Basker, Oleg Gluschenkov, Shogo Mochizuki, Alexander Reznicek | 2018-06-12 |
| 9911849 | Transistor and method of forming same | Veeraraghavan S. Basker, Oleg Gluschenkov, Shogo Mochizuki, Alexander Reznicek | 2018-03-06 |
| 9905692 | SOI FinFET fins with recessed fins and epitaxy in source drain region | Alexander Reznicek, Shogo Mochizuki, Veeraraghavan S. Basker, Oleg Gluschenkov | 2018-02-27 |
| 9865546 | Contacts to semiconductor substrate and methods of forming same | Emre Alptekin, Christian Lavoie, Ahmet S. Ozcan, Kathryn T. Schonenberg | 2018-01-09 |
| 9859216 | Voidless contact metal structures | Veeraraghavan S. Basker, Oleg Gluschenkov, Shogo Mochizuki, Alexander Reznicek | 2018-01-02 |
| 9859403 | Multiple step thin film deposition method for high conformality | Neal A. Makela, Praneet Adusumilli, Domingo A. Ferrer | 2018-01-02 |
| 9653535 | DT capacitor with silicide outer electrode and/or compressive stress layer, and related methods | Ricardo A. Donaton, Dong-Hun Kang, Herbert L. Ho, Rishikesh Krishnan | 2017-05-16 |
| 9595524 | FinFET source-drain merged by silicide-based material | Brent A. Anderson, Christian Lavoie | 2017-03-14 |
| 9543167 | FinFET source-drain merged by silicide-based material | Brent A. Anderson, Christian Lavoie | 2017-01-10 |
| 9496329 | DT capacitor with silicide outer electrode and/or compressive stress layer, and related methods | Ricardo A. Donaton, Dong-Hun Kang, Herbert L. Ho, Rishikesh Krishnan | 2016-11-15 |