Issued Patents All Time
Showing 101–125 of 635 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11177162 | Trapezoidal interconnect at tight BEOL pitch | Nicholas Anthony Lanzillo, Hosadurga Shobha, Huai Huang, Junli Wang, Koichi Motoyama +1 more | 2021-11-16 |
| 11177166 | Etch stop layer removal for capacitance reduction in damascene top via integration | Christopher J. Penny, Brent A. Anderson, Robert R. Robison, Kisik Choi, Nicholas Anthony Lanzillo | 2021-11-16 |
| 11171001 | Multiple patterning scheme integration with planarized cut patterning | Hsueh-Chung Chen, Yongan Xu, Yann Mignot, Cornelius Brown Peethala | 2021-11-09 |
| 11171063 | Metalization repair in semiconductor wafers | Baozhen Li, Kirk D. Peterson, John E. Sheets, II | 2021-11-09 |
| 11171064 | Metalization repair in semiconductor wafers | Baozhen Li, Kirk D. Peterson, John E. Sheets, II | 2021-11-09 |
| 11171084 | Top via with next level line selective growth | Brent A. Anderson, Christopher J. Penny, Nicholas Anthony Lanzillo, Kisik Choi, Robert R. Robison | 2021-11-09 |
| 11164817 | Multi-chip package structures with discrete redistribution layers | Joshua M. Rubin, Kamal K. Sikka, Steven L. Wright | 2021-11-02 |
| 11164778 | Barrier-free vertical interconnect structure | Junli Wang, Hsueh-Chung Chen, Su Chen Fan, Yann Mignot | 2021-11-02 |
| 11163932 | Semiconductor process modeling to enable skip via in place and route flow | Dongbing Shao, Zheng Xu | 2021-11-02 |
| 11164377 | Motion-controlled portals in virtual reality | Aldis Sipolins, Benjamin D. Briggs, Michael Rizzolo, Christopher J. Penny, Patrick Watson | 2021-11-02 |
| 11164777 | Top via with damascene line and via | Brent A. Anderson, Kisik Choi, Nicholas Anthony Lanzillo, Christopher J. Penny, Robert R. Robison | 2021-11-02 |
| 11154628 | Self-sterilizing sensor | Kangguo Cheng, Shawn P. Fetterolf, Donald F. Canaperi | 2021-10-26 |
| 11158537 | Top vias with subtractive line formation | Brent A. Anderson, Nicholas Anthony Lanzillo, Christopher J. Penny, Kisik Choi, Robert R. Robison | 2021-10-26 |
| 11158584 | Selective CVD alignment-mark topography assist for non-volatile memory | Michael Rizzolo, Chih-Chao Yang, Benjamin D. Briggs | 2021-10-26 |
| 11152307 | Buried local interconnect | Kangguo Cheng, Carl Radens, Junli Wang, John H. Zhang | 2021-10-19 |
| 11152299 | Hybrid selective dielectric deposition for aligned via integration | Nicholas Anthony Lanzillo, Christopher J. Penny, Hosadurga Shobha, Robert R. Robison | 2021-10-19 |
| 11152257 | Barrier-less prefilled via formation | Nicholas Anthony Lanzillo, Hosadurga Shobha, Junli Wang, Christopher J. Penny, Robert R. Robison +1 more | 2021-10-19 |
| 11145543 | Semiconductor via structure with lower electrical resistance | Baozhen Li, Kirk D. Peterson, Terry A. Spooner, Junli Wang | 2021-10-12 |
| 11138890 | Secure access for drone package delivery | Benjamin D. Briggs, Leigh Anne H. Clevenger, Christopher J. Penny, Michael Rizzolo, Aldis Sipolins | 2021-10-05 |
| 11139201 | Top via with hybrid metallization | Koichi Motoyama, Nicholas Anthony Lanzillo, Christopher J. Penny, Somnath Ghosh, Robert R. Robison | 2021-10-05 |
| 11132712 | Method for using 3D positional spatial olfaction for virtual marketing | Benjamin D. Briggs, Leigh Anne H. Clevenger, Christoper J. Penny, Michael Rizzolo, Aldis Sipolins | 2021-09-28 |
| 11133058 | Analog computing architecture for four terminal memory devices | Timothy Mathew Philip, Kevin W. Brew | 2021-09-28 |
| 11133259 | Multi-chip package structure having high density chip interconnect bridge with embedded power distribution network | Joshua M. Rubin, Arvind Kumar, Steven L. Wright, Wiren D. Becker, Xiao Hu Liu | 2021-09-28 |
| 11114410 | Multi-chip package structures formed by joining chips to pre-positioned chip interconnect bridge devices | Joshua M. Rubin, Steven L. Wright | 2021-09-07 |
| 11107984 | Protuberant contacts for resistive switching devices | Takashi Ando, Chih-Chao Yang | 2021-08-31 |