Issued Patents All Time
Showing 126–150 of 437 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10896972 | Self-aligned contact for vertical field effect transistor | Brent A. Anderson, Steven R. Bentley, Su Chen Fan, Balasubramanian Pranatharthiharan, Ruilong Xie | 2021-01-19 |
| 10886363 | Metal-insulator-metal capacitor structure | Veeraraghavan S. Basker, Kangguo Cheng, Theodoras E. Standaert | 2021-01-05 |
| 10840373 | Integration of input/output device in vertical field-effect transistor technology | Xuefeng Liu, Brent A. Anderson, Terence B. Hook, Gauri Karve | 2020-11-17 |
| 10840147 | Fin cut forming single and double diffusion breaks | Juntao Li, Kangguo Cheng, Ruilong Xie | 2020-11-17 |
| 10833147 | Metal-insulator-metal capacitor structure | Veeraraghavan S. Basker, Kangguo Cheng, Theodoras E. Standaert | 2020-11-10 |
| 10832975 | Reduced static random access memory (SRAM) device foot print through controlled bottom source/drain placement | Ruqiang Bao, Brent A. Anderson, Kangguo Cheng, Choonghyun Lee, Hemanth Jagannathan | 2020-11-10 |
| 10833149 | Capacitors | Veeraraghavan S. Basker, Kangguo Cheng, Christopher J. Penny, Theodorus E. Standaert | 2020-11-10 |
| 10833155 | Vertical field effect transistor with top and bottom airgap spacers | Chun-Chen Yeh, Veeraraghavan S. Basker, Alexander Reznicek | 2020-11-10 |
| 10833180 | Self-aligned tunneling field effect transistors | Yi Song, Chi-Chun Liu, Liying Jiang | 2020-11-10 |
| 10833204 | Multiple width nanosheet devices | Kangguo Cheng, Lawrence A. Clevenger, Carl Radens, John H. Zhang | 2020-11-10 |
| 10825890 | Metal-insulator-metal capacitor structure | Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert | 2020-11-03 |
| 10825891 | Metal-insulator-metal capacitor structure | Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert | 2020-11-03 |
| 10811507 | Vertical transistors having multiple gate thicknesses for optimizing performance and device density | Brent A. Anderson, Fee Li Lie, Stuart A. Sieg | 2020-10-20 |
| 10811508 | Vertical transistors having multiple gate thicknesses for optimizing performance and device density | Brent A. Anderson, Fee Li Lie, Stuart A. Sieg | 2020-10-20 |
| 10811528 | Two step fin etch and reveal for VTFETs and high breakdown LDVTFETs | Mona A. Ebrish, Xuefeng Liu, Brent A. Anderson, Huiming Bu | 2020-10-20 |
| 10804368 | Semiconductor device having two-part spacer | Ruqiang Bao, Dechao Guo, Heng Wu, Ernest Y. Wu | 2020-10-13 |
| 10797163 | Leakage control for gate-all-around field-effect transistor devices | Lan Yu, Heng Wu, Ruqiang Bao, Dechao Guo | 2020-10-06 |
| 10784159 | Semiconductor device and method of forming the semiconductor device | Lawrence A. Clevenger, Baozhen Li, Kirk D. Peterson, John E. Sheets, II, Chih-Chao Yang | 2020-09-22 |
| 10777469 | Self-aligned top spacers for vertical FETs with in situ solid state doping | Ruqiang Bao, Brent A. Anderson, Xin Miao | 2020-09-15 |
| 10755985 | Gate metal patterning for tight pitch applications | Shogo Mochizuki, Alexander Reznicek, Joshua M. Rubin | 2020-08-25 |
| 10741544 | Integration of electrostatic discharge protection into vertical fin technology | Brent A. Anderson, Huiming Bu, Terence B. Hook, Xuefeng Liu | 2020-08-11 |
| 10734289 | Method for forming strained fin channel devices | Kangguo Cheng, Lawrence A. Clevenger, Carl Radens, John H. Zhang | 2020-08-04 |
| 10734504 | Integration of strained silicon germanium PFET device and silicon NFET device for finFET structures | Bruce B. Doris, Hong He, Nicolas Loubet | 2020-08-04 |
| 10734372 | Vertical transport static random-access memory cells with transistors of active regions arranged in linear rows | Brent A. Anderson, Stuart A. Sieg | 2020-08-04 |
| 10714596 | Directional deposition of protection layer | Hong He, Juntao Li, Chih-Chao Yang | 2020-07-14 |