Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11682718 | Vertical bipolar junction transistor with all-around extrinsic base and epitaxially graded intrinsic base | Alexander Reznicek, Bahman Hekmatshoartabari, Tak H. Ning | 2023-06-20 |
| 11282186 | Anomaly detection using image-based physical characterization | Dechao Guo, Derrick Liu, Jingyun Zhang, Huimei Zhou | 2022-03-22 |
| 11244869 | Fabrication of logic devices and power devices on the same substrate | Juntao Li, Kangguo Cheng, John G. Gaudiello | 2022-02-08 |
| 11177132 | Self aligned block masks for implantation control | Junli Wang, Romain Lallement, Ardasheir Rahman, Brent A. Anderson | 2021-11-16 |
| 11088278 | Precise junction placement in vertical semiconductor devices using etch stop layers | Huiming Bu, Siyuranga O. Koswatta, Junli Wang | 2021-08-10 |
| 10903162 | Fuse element resistance enhancement by laser anneal and ion implantation | Juntao Li, Chih-Chao Yang, Michael Rizzolo, Yi Song | 2021-01-26 |
| 10833180 | Self-aligned tunneling field effect transistors | Yi Song, Junli Wang, Chi-Chun Liu | 2020-11-10 |
| 10811599 | Co-fabrication of magnetic device structures with electrical interconnects having reduced resistance through increased conductor grain size | Lawrence A. Clevenger, Sebastian Naczas, Michael Rizzolo, Chih-Chao Yang | 2020-10-20 |
| 10756260 | Co-fabrication of magnetic device structures with electrical interconnects having reduced resistance through increased conductor grain size | Lawrence A. Clevenger, Sebastian Naczas, Michael Rizzolo, Chih-Chao Yang | 2020-08-25 |
| 10685886 | Fabrication of logic devices and power devices on the same substrate | Juntao Li, Kangguo Cheng, John G. Gaudiello | 2020-06-16 |
| 10664966 | Anomaly detection using image-based physical characterization | Dechao Guo, Derrick Liu, Jingyun Zhang, Huimei Zhou | 2020-05-26 |
| 10361364 | Co-fabrication of magnetic device structures with electrical interconnects having reduced resistance through increased conductor grain size | Lawrence A. Clevenger, Sebastian Naczas, Michael Rizzolo, Chih-Chao Yang | 2019-07-23 |
| 10249754 | Precise junction placement in vertical semiconductor devices using etch stop layers | Huiming Bu, Siyuranga O. Koswatta, Junli Wang | 2019-04-02 |
| 10224429 | Precise junction placement in vertical semiconductor devices using etch stop layers | Huiming Bu, Siyuranga O. Koswatta, Junli Wang | 2019-03-05 |
| 9954101 | Precise junction placement in vertical semiconductor devices using etch stop layers | Huiming Bu, Siyuranga O. Koswatta, Junli Wang | 2018-04-24 |