Issued Patents All Time
Showing 101–125 of 437 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11049858 | Vertical fin field effect transistor devices with a replacement metal gate | Ruqiang Bao, Michael P. Belyansky | 2021-06-29 |
| 11024369 | Static random-access memory cell design | Lan Yu, Heng Wu, Ruqiang Bao, Dechao Guo | 2021-06-01 |
| 11011513 | Integrating a junction field effect transistor into a vertical field effect transistor | Brent A. Anderson, Huiming Bu, Terence B. Hook, Xuefeng Liu | 2021-05-18 |
| 11011517 | Semiconductor structure including first FinFET devices for low power applications and second FinFET devices for high power applications | Lan Yu, Heng Wu, Ruqiang Bao, Dechao Guo | 2021-05-18 |
| 11004850 | Vertical fin field effect transistor devices with a replacement metal gate | Ruqiang Bao, Michael P. Belyansky | 2021-05-11 |
| 11004736 | Integrated circuit having a single damascene wiring network | Hsueh-Chung Chen, Somnath Ghosh, Chih-Chao Yang, Lawrence A. Clevenger | 2021-05-11 |
| 10998242 | Semiconductor device including dual trench epitaxial dual-liner contacts | Veeraraghavan S. Basker, Kangguo Cheng, Theodoras E. Standaert | 2021-05-04 |
| 10998230 | Fabrication of self-aligned gate contacts and source/drain contacts directly above gate electrodes and source/drains | Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert | 2021-05-04 |
| 10985063 | Semiconductor device with local connection | Kangguo Cheng, Lawrence A. Clevenger, Carl Radens, John H. Zhang | 2021-04-20 |
| 10971601 | Replacement metal gate structures | Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert | 2021-04-06 |
| 10971399 | Oxygen-free replacement liner for improved transistor performance | Heng Wu, Dechao Guo, Ruqiang Bao | 2021-04-06 |
| 10964812 | Integration of input/output device in vertical field-effect transistor technology | Xuefeng Liu, Brent A. Anderson, Terence B. Hook, Gauri Karve | 2021-03-30 |
| 10957794 | Vertical transistor contact for cross-coupling in a memory cell | Brent A. Anderson, Terence B. Hook | 2021-03-23 |
| 10957761 | Electrical isolation for nanosheet transistor devices | Chun-Chen Yeh, Alexander Reznicek, Veeraraghavan S. Basker | 2021-03-23 |
| 10957599 | Integrating extra gate VFET with single gate VFET | Zhenxing Bi, Kangguo Cheng, Peng Xu | 2021-03-23 |
| 10950506 | Forming single and double diffusion breaks | Ruilong Xie, Juntao Li, Kangguo Cheng | 2021-03-16 |
| 10943990 | Gate contact over active enabled by alternative spacer scheme and claw-shaped cap | Andrew M. Greene, Victor Chan, Gangadhara Raja Muthinti, Veeraraghavan S. Basker, Kisik Choi +1 more | 2021-03-09 |
| 10943989 | Gate to source/drain leakage reduction in nanosheet transistors via inner spacer optimization | Heng Wu, Ruqiang Bao, Lan Yu, Dechao Guo | 2021-03-09 |
| 10943972 | Precision BEOL resistors | Baozhen Li, Kirk D. Peterson, John E. Sheets, II, Lawrence A. Clevenger, Chih-Chao Yang | 2021-03-09 |
| 10943911 | Vertical transport devices with greater density through modified well shapes | Brent A. Anderson, Stuart A. Sieg | 2021-03-09 |
| 10937793 | Vertical transistor contact for a memory cell with increased density | Brent A. Anderson, Terence B. Hook | 2021-03-02 |
| 10930754 | Replacement metal gate structures | Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert | 2021-02-23 |
| 10923575 | Low resistance contact for transistors | Lawrence A. Clevenger, Kirk D. Peterson, Baozhen Li, Terry A. Spooner, John E. Sheets, II | 2021-02-16 |
| 10916660 | Vertical transistor with a body contact for back-biasing | Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert | 2021-02-09 |
| 10903338 | Vertical FET with shaped spacer to reduce parasitic capacitance | Kangguo Cheng, Theodorus E. Standaert, Veeraraghavan S. Basker | 2021-01-26 |