Issued Patents All Time
Showing 376–400 of 584 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7732295 | Post last wiring level inductor using patterned plate process | Anil K. Chinthakindi, Douglas D. Coolbaugh, John E. Florkey, Zhong-Xiang He, Anthony K. Stamper +1 more | 2010-06-08 |
| 7732845 | Pixel sensor with reduced image lag | James W. Adkisson, Rajendran Krishnasamy, Solomon Mulugeta | 2010-06-08 |
| 7732294 | Post last wiring level inductor using patterned plate process | Anil K. Chinthakindi, Douglas D. Coolbaugh, John E. Florkey, Zhong-Xiang He, Anthony K. Stamper +1 more | 2010-06-08 |
| 7719118 | Semiconductor chip scale package incorporating through-vias electrically connected to a substrate and other vias that are isolated from the substrate, and method of forming the package | James W. Adkisson, Mark D. Jaffe, Edmund J. Sprogis | 2010-05-18 |
| 7713865 | Preventing damage to metal using clustered processing and at least partially sacrificial encapsulation | Anthony K. Stamper | 2010-05-11 |
| 7709876 | Gap capacitors for monitoring stress in solder balls in flip chip technology | Stephen P. Ayotte, Timothy H. Daubenspeck, Christopher D. Muzzy, Wolfgang Sauter | 2010-05-04 |
| 7704876 | Dual damascene interconnect structures having different materials for line and via conductors | Edward C. Cooney, III, Anthony K. Stamper, William T. Motsiff, Michael Lane, Andrew H. Simon | 2010-04-27 |
| 7704804 | Method of forming a crack stop laser fuse with fixed passivation layer coverage | Timothy H. Daubenspeck, Christopher D. Muzzy, Wolfgang Sauter | 2010-04-27 |
| 7687340 | Protect diodes for hybrid-orientation substrate structures | James W. Adkisson, Alain Loiseau, Kirk D. Peterson | 2010-03-30 |
| 7682961 | Methods of forming solder connections and structure thereof | Timothy H. Daubenspeck, Christopher D. Muzzy, Wolfgang Sauter | 2010-03-23 |
| 7678683 | Method of fabricating copper damascene and dual damascene interconnect wiring | William R. Hill, Kenneth E. McAvey, Jr., Thomas L. McDevitt, Anthony K. Stamper, Arthur C. Winslow +1 more | 2010-03-16 |
| 7670921 | Structure and method for self aligned vertical plate capacitor | Anil K. Chinthakindi, Douglas D. Coolbaugh, Timothy J. Dalton, Ebenezer E. Eshun, Anthony K. Stamper +1 more | 2010-03-02 |
| 7671442 | Air-gap insulated interconnections | Brent A. Anderson, Andres Bryant, Anthony K. Stamper | 2010-03-02 |
| 7670927 | Double-sided integrated circuit chips | Kerry Bernstein, Timothy J. Dalton, Mark D. Jaffe, Paul D. Kartschoke, Stephen E. Luce +1 more | 2010-03-02 |
| 7666746 | Semiconductor transistors having high-K gate dielectric layers, metal gate electrode regions, and low fringing capacitances | — | 2010-02-23 |
| 7662722 | Air gap under on-chip passive device | Anthony K. Stamper, Anil K. Chinthakindi, Douglas D. Coolbaugh, Timothy J. Dalton, Daniel C. Edelstein +3 more | 2010-02-16 |
| 7655495 | Damascene copper wiring optical image sensor | James W. Adkisson, Mark D. Jaffe, Robert K. Leidy, Anthony K. Stamper | 2010-02-02 |
| 7652313 | Deep trench contact and isolation of buried photodetectors | John J. Ellis-Monaghan, Jeffrey B. Johnson, Jerome B. Lasky | 2010-01-26 |
| 7635643 | Method for forming C4 connections on integrated circuit chips and the resulting devices | Timothy H. Daubenspeck, Mukta G. Farooq, Christopher D. Muzzy, Kevin S. Petrarca, Wolfgang Sauter | 2009-12-22 |
| 7633106 | Light shield for CMOS imager | James W. Adkisson, Mark D. Jaffe | 2009-12-15 |
| 7622364 | Bond pad for wafer and package for CMOS imager | James W. Adkisson, Mark D. Jaffe, Richard J. Rassel | 2009-11-24 |
| 7614147 | Method of creating contour structures to highlight inspection region | Timothy H. Daubenspeck, Christopher D. Muzzy, Wolfgang Sauter | 2009-11-10 |
| 7601628 | Wire and solder bond forming methods | Timothy H. Daubenspeck, Christopher D. Muzzy, Wolfgang Sauter | 2009-10-13 |
| 7598614 | Low leakage metal-containing cap process using oxidation | Jason P. Gill, Sean Smith, Jean Wynne | 2009-10-06 |
| 7592685 | Device and methodology for reducing effective dielectric constant in semiconductor devices | Daniel C. Edelstein, Matthew E. Colburn, Edward C. Cooney, III, Timothy J. Dalton, John A. Fitzsimmons +10 more | 2009-09-22 |