JC

James A. Culp

IBM: 44 patents #2,042 of 70,183Top 3%
Globalfoundries: 3 patents #1,029 of 4,424Top 25%
MG Mentor Graphics: 2 patents #191 of 698Top 30%
📍 Newburgh, NY: #7 of 198 inventorsTop 4%
🗺 New York: #1,862 of 115,490 inventorsTop 2%
Overall (All Time): #54,670 of 4,157,543Top 2%
50
Patents All Time

Issued Patents All Time

Showing 26–50 of 50 patents

Patent #TitleCo-InventorsDate
8176444 Analyzing multiple induced systematic and statistical layout dependent effects on circuit performance Shayak Banerjee, Dureseti Chidambarrao, Praveen Elakkumanan, Saibal Mukhopadhyay 2012-05-08
8161422 Fast and accurate method to simulate intermediate range flare effects Maharaj Mukherjee, Scott M. Mansfield, Kafai Lai, Alan E. Rosenbluth 2012-04-17
8141027 Automated sensitivity definition and calibration for design for manufacturing tools Jason D. Hibbeler, Lars Liebmann, Tina Wagner 2012-03-20
8042070 Methods and system for analysis and management of parametric yield Paul Chang, Dureseti Chidambarrao, Praveen Elakkumanan, Jason D. Hibbeler, Anda C. Mocuta 2011-10-18
7975244 Methodology and system for determining numerical errors in pixel-based imaging simulation in designing lithographic masks Maharaj Mukherjee, Alan E. Rosenbluth 2011-07-05
7935638 Methods and structures for enhancing perimeter-to-surface area homogeneity John J. Ellis-Monaghan, Jeffrey P. Gambino, Kirk D. Peterson, Jed H. Rankin 2011-05-03
7900178 Integrated circuit (IC) design method, system and program product Gregory A. Northrop, Ming Yin 2011-03-01
7890906 Method of laying out integrated circuit design based on known polysilicon perimeter densities of individual cells Laura S. Chadwick, David J. Hathaway, Anthony D. Polson 2011-02-15
7865864 Electrically driven optical proximity correction Shayak Banerjee, Praveen Elakkumanan, Lars Liebmann 2011-01-04
7849433 Integrated circuit with uniform polysilicon perimeter density, method and design structure Laura S. Chadwick, David J. Hathaway, Anthony D. Polson 2010-12-07
7805693 IC chip design modeling using perimeter density to electrical characteristic correlation Laura S. Chadwick, Anthony D. Polson 2010-09-28
7669175 Methodology to improve turnaround for integrated circuit design using geometrical hierarchy Maharaj Mukherjee, Timothy G. Dunham, Mark A. Lavin 2010-02-23
7627836 OPC trimming for performance Lars Liebmann, Rajeev Malik, K. Paul Muller, Shreesh Narasimha, Stephen L. Runyon +1 more 2009-12-01
7565633 Verifying mask layout printability using simulation with adjustable accuracy Maharaj Mukherjee, Scott M. Mansfield 2009-07-21
7536664 Physical design system and method John M. Cohn, Ulrich A. Finkler, Fook-Luen Heng, Mark A. Lavin, Jin-Fuw Lee +6 more 2009-05-19
7503028 Multilayer OPC for design aware manufacturing Maharaj Mukherjee, Lars Liebmann, Scott M. Mansfield 2009-03-10
7473648 Double exposure double resist layer process for forming gate patterns Timothy A. Brunner, Lars Liebmann 2009-01-06
7450748 Mask inspection process accounting for mask writer proximity correction Karen D. Badger, Azalia Krasnoperova 2008-11-11
7269808 Design verification James A. Bruce, John D. Nickel, Jacek G. Smolinski 2007-09-11
6996797 Method for verification of resolution enhancement techniques and optical proximity correction in lithography Lars Liebmann, Ioana Graur, Maharaj Mukherjee 2006-02-07
6892365 Method for performing monte-carlo simulations to predict overlay failures in integrated circuit designs Mark A. Lavin, Robert T. Sayah 2005-05-10
6750109 Halo-free non-rectifying contact on chip with halo source/drain diffusion Jawahar P. Nayak, Werner Rausch, Melanie J. Sherony, Steven H. Voldman, Noah Zamdmer 2004-06-15
6713791 T-RAM array having a planar cell structure and method for fabricating the same Louis L. Hsu, Rajiv V. Joshi, Fariborz Assaderaghi, Dan Moy, Werner Rausch 2004-03-30
6541166 Method and apparatus for lithographically printing tightly nested and isolated device features using multiple mask exposures Scott M. Mansfield, Timothy A. Brunner, Alfred Wong 2003-04-01
6429482 Halo-free non-rectifying contact on chip with halo source/drain diffusion Jawahar P. Nayak, Werner Rausch, Melanie J. Sherony, Steven H. Voldman, Noah Zamdmer 2002-08-06