Issued Patents All Time
Showing 526–550 of 633 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7223684 | Dual damascene wiring and method | Thomas L. McDevitt | 2007-05-29 |
| 7193289 | Damascene copper wiring image sensor | James W. Adkisson, Jeffrey P. Gambino, Mark D. Jaffe, Robert K. Leidy | 2007-03-20 |
| 7192874 | Method for reducing foreign material concentrations in etch chambers | Edward C. Cooney, III | 2007-03-20 |
| 7188322 | Circuit layout methodology using a shape processing application | John M. Cohn, Jason D. Hibbeler, Jed H. Rankin | 2007-03-06 |
| 7183656 | Bilayer aluminum last metal for interconnects and wirebond pads | Stephen E. Luce, Thomas L. McDevitt | 2007-02-27 |
| 7180187 | Interlayer connector for preventing delamination of semiconductor device | John A. Fitzsimmons, Jeffrey P. Gambino | 2007-02-20 |
| 7176119 | Method of fabricating copper damascene and dual damascene interconnect wiring | Jeffrey P. Gambino, William R. Hill, Kenneth F. McAvey, Jr., Thomas L. McDevitt, Arthur C. Winslow +1 more | 2007-02-13 |
| 7169698 | Sacrificial inorganic polymer intermetal dielectric damascene wire and via liner | Jeffrey P. Gambino | 2007-01-30 |
| 7153776 | Method for reducing amine based contaminants | Xiaomeng Chen, William J. Cote, Arthur C. Winslow | 2006-12-26 |
| 7109093 | Crackstop with release layer for crack control in semiconductors | John A. Fitzsimmons, Michael Lane, Vincent J. McGahay, Thomas M. Shaw | 2006-09-19 |
| 7087997 | Copper to aluminum interlayer interconnect using stud and via liner | Lloyd Burrell, Edward E. Cooney, III, Jeffrey P. Gambino, John E. Heidenreich, III, Hyun Koo Lee +6 more | 2006-08-08 |
| 7081680 | Self-aligned corrosion stop for copper C4 and wirebond | Daniel C. Edelstein, Judith M. Rubino, Carlos J. Sambucetti | 2006-07-25 |
| 7078814 | Method of forming a semiconductor device having air gaps and the structure so formed | — | 2006-07-18 |
| 7073702 | Self-locking wire bond structure and method of making the same | John A. Fitzsimmons, Jeffrey P. Gambino | 2006-07-11 |
| 7052925 | Method for manufacturing self-compensating resistors within an integrated circuit | William J. Murphy, Edmund J. Sprogis, Erick G. Walton | 2006-05-30 |
| 7045372 | Apparatus and method for forming a battery in an integrated circuit | Arne Ballantine, Robert A. Groves, Jennifer Lund, James S. Nakos, Michael B. Rice | 2006-05-16 |
| 7037824 | Copper to aluminum interlayer interconnect using stud and via liner | Lloyd Burrell, Edward E. Cooney, III, Jeffrey P. Gambino, John E. Heidenreich, III, Hyun Koo Lee +6 more | 2006-05-02 |
| 7034400 | Dual damascene interconnect structure using low stress fluorosilicate insulator with copper conductors | Edward Barth, Glenn A. Biery, Jeffrey P. Gambino, Thomas Ivers, Hyun Koo Lee +2 more | 2006-04-25 |
| 7015150 | Exposed pore sealing post patterning | Edward C. Cooney, III, John A. Fitzsimmons, Jeffrey P. Gambino, Stephen E. Luce, Thomas L. McDevitt +1 more | 2006-03-21 |
| 6991971 | Method for fabricating a triple damascene fuse | Timothy H. Daubenspeck, Thomas L. McDevitt, William T. Motsiff | 2006-01-31 |
| 6989105 | Detection of hardmask removal using a selective etch | Jeffrey P. Gambino, Richard Wistrom | 2006-01-24 |
| 6982227 | Single and multilevel rework | Edward C. Cooney, III, Robert M. Geffken, Vincent J. McGahay, William T. Motsiff, Mark P. Murray +4 more | 2006-01-03 |
| 6962875 | Variable contact method and structure | — | 2005-11-08 |
| 6960744 | Electrically tunable on-chip resistor | James W. Adkisson | 2005-11-01 |
| 6960519 | Interconnect structure improvements | Timothy J. Dalton, John A. Fitzsimmons, Jeffrey P. Gambino, Lee M. Nicholson, Andrew H. Simon | 2005-11-01 |