Issued Patents All Time
Showing 76–100 of 213 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9236258 | Methods of forming gate structures for semiconductor devices using a replacement gate technique and the resulting devices | Ruilong Xie, Xiuyu Cai, Qi Zhang, Ajey Poovannummoottil Jacob, Michael Hargrove | 2016-01-12 |
| 9236437 | Method for creating self-aligned transistor contacts | Mark A. Zaleski, Jason E. Stephens, Tuhin Guha Neogi, Guillaume Bouche | 2016-01-12 |
| 9224638 | Integrated circuits with metal-titanium oxide contacts and fabrication methods | Hiroaki Niimi, Kisik Choi, Hoon Kim, Guillaume Bouche | 2015-12-29 |
| 9224842 | Patterning multiple, dense features in a semiconductor device using a memorization layer | Guillaume Bouche, Xiang Hu, Jerome F. Wandell, Sandeep Gaan | 2015-12-29 |
| 9219002 | Overlay performance for a fin field effect transistor device | Zhenyu Hu, Qi Zhang, Richard J. Carter, Hongliang Shen, Daniel T. Pham +1 more | 2015-12-22 |
| 9202751 | Transistor contacts self-aligned in two dimensions | Guillaume Bouche, Mark A. Zaleski, Tuhin Guha Neogi, Jason E. Stephens, Jongwook Kye +1 more | 2015-12-01 |
| 9196710 | Integrated circuits with relaxed silicon / germanium fins | Jin Ping Liu, Shao-Ming Koh, Amaury Gendron | 2015-11-24 |
| 9196694 | Integrated circuits with dual silicide contacts and methods for fabricating same | Guillaume Bouche, Shao-Ming Koh, Jeremy A. Wahl | 2015-11-24 |
| 9196499 | Method of forming semiconductor fins | Dae-Han Choi, Dae Geun Yang, Xiang Hu, Mariappan Hariharaputhiran | 2015-11-24 |
| 9184095 | Contact bars with reduced fringing capacitance in a semiconductor device | Thilo Scheiper, Sven Beyer, Uwe Griebenow, Jan Hoentschel | 2015-11-10 |
| 9177805 | Integrated circuits with metal-insulator-semiconductor (MIS) contact structures and methods for fabricating same | Guillaume Bouche, Shao-Ming Koh, Jeremy A. Wahl | 2015-11-03 |
| 9177951 | Three-dimensional electrostatic discharge semiconductor device | Jagar Singh, Mahadeva Iyer Natarajan | 2015-11-03 |
| 9159630 | Fin field-effect transistor (FinFET) device formed using a single spacer, double hardmask scheme | Dae Geun Yang, Dae-Han Choi | 2015-10-13 |
| 9147696 | Devices and methods of forming finFETs with self aligned fin formation | Jing Wan, Lun Zhao, Dae Geun Yang, Jin Ping Liu, Tien Ying Luo +3 more | 2015-09-29 |
| 9136175 | Methods for fabricating integrated circuits | Peter Baars, Erik Geiss | 2015-09-15 |
| 9129987 | Replacement low-K spacer | Jing Wan, Jin Ping Liu, Guillaume Bouche, Lakshmanan H. Vanamurthy, Cuiqin Xu +3 more | 2015-09-08 |
| 9123568 | Encapsulation of closely spaced gate electrode structures | Peter Baars, Richard J. Carter | 2015-09-01 |
| 9117908 | Methods of forming replacement gate structures for semiconductor devices and the resulting semiconductor products | Ruilong Xie, Xiuyu Cai | 2015-08-25 |
| 9117842 | Methods of forming contacts to source/drain regions of FinFET devices | Shao-Ming Koh | 2015-08-25 |
| 9105507 | Methods of forming a FinFET semiconductor device with undoped fins | Akshey Sehgal, Seung Kim, Teck Jung Tang, Francis M. Tambwe | 2015-08-11 |
| 9105478 | Devices and methods of forming fins at tight fin pitches | Mariappan Hariharaputhiran, Dae Geun Yang, Dae-Han Choi, Xiang Hu, Richard J. Carter +1 more | 2015-08-11 |
| 9040403 | Methods for fabricating integrated circuits having gate to active and gate to gate interconnects | Thilo Scheiper, Stefan Flachowsky | 2015-05-26 |
| 9034767 | Facilitating mask pattern formation | Xiang Hu, Dae-Han Choi, Dae Geun Yang, Taejoon Han | 2015-05-19 |
| 9034744 | Replacement gate approach for high-k metal gate stacks by avoiding a polishing process for exposing the placeholder material | Ralf Richter, Jens Heinrich | 2015-05-19 |
| 9023712 | Method for self-aligned removal of a high-K gate dielectric above an STI region | Roman Boschke, Markus Forsberg | 2015-05-05 |