Issued Patents All Time
Showing 1–25 of 45 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9490189 | Semiconductor device comprising a stacked die configuration including an integrated peltier element | Jan Hoentschel, Thilo Scheiper, Sven Beyer | 2016-11-08 |
| 9184095 | Contact bars with reduced fringing capacitance in a semiconductor device | Thilo Scheiper, Sven Beyer, Jan Hoentschel, Andy Wei | 2015-11-10 |
| 9054207 | Field effect transistors for a flash memory comprising a self-aligned charge storage region | Thilo Scheiper, Sven Beyer, Jan Hoentschel | 2015-06-09 |
| 8883582 | High-K gate electrode structure formed after transistor fabrication by using a spacer | Kai Frohberg, Katrin Reiche, Heike Berthold | 2014-11-11 |
| 8786027 | Transistors comprising high-K metal gate electrode structures and embedded strain-inducing semiconductor alloys formed in a late stage | Jan Hoentschel, Thilo Scheiper, Sven Beyer | 2014-07-22 |
| 8759960 | Semiconductor device comprising a stacked die configuration including an integrated Peltier element | Jan Hoentschel, Thilo Scheiper, Sven Beyer | 2014-06-24 |
| 8748281 | Enhanced confinement of sensitive materials of a high-K metal gate electrode structure | Jan Hoentschel, Sven Beyer, Thilo Scheiper | 2014-06-10 |
| 8735237 | Method for increasing penetration depth of drain and source implantation species for a given gate height | Kai Frohberg, Frank Feustel, Thomas Werner | 2014-05-27 |
| 8673713 | Method for forming a transistor with recessed drain and source areas and non-conformal metal silicide regions | Jan Hoentschel, Andy Wei | 2014-03-18 |
| 8669151 | High-K metal gate electrode structures formed at different process stages of a semiconductor device | Jan Hoentschel, Sven Beyer, Thilo Scheiper | 2014-03-11 |
| 8615145 | Semiconductor device comprising a buried waveguide for device internal optical communication | Kai Frohberg, Jan Hoentschel | 2013-12-24 |
| 8574991 | Asymmetric transistor devices formed by asymmetric spacers and tilted implantation | Jan Hoentschel, Maciej Wiatr | 2013-11-05 |
| 8541885 | Technique for enhancing transistor performance by transistor specific contact design | Martin Gerhardt, Ralf Richter, Thomas Feudel | 2013-09-24 |
| 8536036 | Predoped semiconductor material for a high-K metal gate electrode structure of P- and N-channel transistors | Sven Beyer, Jan Hoentschel, Thilo Scheiper | 2013-09-17 |
| 8508008 | Optical signal transfer in a semiconductor device by using monolithic opto-electronic components | Sven Beyer, Thilo Sheiper, Jan Hoentschel | 2013-08-13 |
| 8507348 | Field effect transistors for a flash memory comprising a self-aligned charge storage region | Thilo Scheiper, Sven Beyer, Jan Hoentschel | 2013-08-13 |
| 8470661 | High-K gate electrode structure formed after transistor fabrication by using a spacer | Kai Frohberg, Katrin Reiche, Heike Berthold | 2013-06-25 |
| 8455314 | Transistors comprising high-K metal gate electrode structures and embedded strain-inducing semiconductor alloys formed in a late stage | Jan Hoentschel, Thilo Scheiper, Sven Beyer | 2013-06-04 |
| 8450163 | Semiconductor device comprising metal gates and semiconductor resistors formed on the basis of a replacement gate approach | Sven Beyer, Klaus Hempel, Roland Stejskal, Andy Wei, Thilo Scheiper +2 more | 2013-05-28 |
| 8440534 | Threshold adjustment for MOS devices by adapting a spacer width prior to implantation | Jan Hoentschel, Kai Frohberg, Heike Berthold, Katrin Reiche, Frank Feustel +1 more | 2013-05-14 |
| 8426266 | Stress memorization with reduced fringing capacitance based on silicon nitride in MOS semiconductor devices | Jan Hoentschel, Andreas Kurz, Thilo Scheiper | 2013-04-23 |
| 8426262 | Stress adjustment in stressed dielectric materials of semiconductor devices by stress relaxation based on radiation | Jan Hoentschel, Roman Boschke | 2013-04-23 |
| 8409942 | Replacement gate approach based on a reverse offset spacer applied prior to work function metal deposition | Thilo Scheiper, Sven Beyer, Jan Hoentschel | 2013-04-02 |
| 8361844 | Method for adjusting the height of a gate electrode in a semiconductor device | Kai Frohberg, Heike Berthold, Katrin Reiche | 2013-01-29 |
| 8349744 | Double deposition of a stress-inducing layer in an interlayer dielectric with intermediate stress relaxation in a semiconductor device | Kai Frohberg, Katrin Reiche, Heike Berthold | 2013-01-08 |