Issued Patents All Time
Showing 26–45 of 45 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8338894 | Increased depth of drain and source regions in complementary transistors by forming a deep drain and source region prior to a cavity etch | Jan Hoentschel, Sven Beyer | 2012-12-25 |
| 8329531 | Strain memorization in strained SOI substrates of semiconductor devices | Jan Hoentschel, Sven Beyer, Thilo Scheiper | 2012-12-11 |
| 8324039 | Reduced silicon thickness of N-channel transistors in SOI CMOS devices | — | 2012-12-04 |
| 8318564 | Performance enhancement in transistors comprising high-k metal gate stack by an early extension implantation | Thilo Scheiper, Sven Beyer, Jan Hoentschel | 2012-11-27 |
| 8278174 | In situ formed drain and source regions including a strain-inducing alloy and a graded dopant profile | Jan Hoentschel, Vassilios Papageorgiou | 2012-10-02 |
| 8247275 | Strain engineering in three-dimensional transistors based on globally strained semiconductor base layers | Jan Hoentschel, Sven Beyer | 2012-08-21 |
| 8241973 | Method for increasing penetration depth of drain and source implantation species for a given gate height | Kai Frohberg, Frank Feustel, Thomas Werner | 2012-08-14 |
| 8198633 | Stress transfer enhancement in transistors by a late gate re-crystallization | Jan Hoentschel | 2012-06-12 |
| 8198152 | Transistors comprising high-k metal gate electrode structures and adapted channel semiconductor materials | Sven Beyer, Jan Hoentschel, Thilo Scheiper | 2012-06-12 |
| 8158482 | Asymmetric transistor devices formed by asymmetric spacers and tilted implantation | Jan Hoentschel, Maciej Wiatr | 2012-04-17 |
| 8110487 | Method of creating a strained channel region in a transistor by deep implantation of strain-inducing species below the channel region | Kai Frohberg, Christoph Schwan, Kerstin Ruttloff | 2012-02-07 |
| 8105962 | Method and a semiconductor device comprising a protection layer for reducing stress relaxation in a dual stress liner approach | Kai Frohberg, Frank Feustel, Thomas Werner | 2012-01-31 |
| 8039342 | Enhanced integrity of a high-K metal gate electrode structure by using a sacrificial spacer for cap removal | Jan Hoentschel, Thilo Scheiper, Andy Wei | 2011-10-18 |
| 8034669 | Drive current adjustment for transistors formed in the same active region by locally providing embedded strain-inducing semiconductor material in the active region | Jan Hoentschel | 2011-10-11 |
| 8026134 | Recessed drain and source areas in combination with advanced silicide formation in transistors | Andy Wei, Jan Hoentschel, Thilo Scheiper | 2011-09-27 |
| 8017504 | Transistor having a high-k metal gate stack and a compressively stressed channel | Jan Hoentschel, Kai Frohberg | 2011-09-13 |
| 7964970 | Technique for enhancing transistor performance by transistor specific contact design | Martin Gerhardt, Ralf Richter, Thomas Feudel | 2011-06-21 |
| 7887978 | Method of detecting repeating defects in lithography masks on the basis of test substrates exposed under varying conditions | Martin Mazur, Wolfram Grundke, Andre Poock | 2011-02-15 |
| 7871877 | Technique for strain engineering in silicon-based transistors by using implantation techniques for forming a strain-inducing layer under the channel region | Kai Frohberg, Martin Gerhardt | 2011-01-18 |
| 7855118 | Drive current increase in transistors by asymmetric amorphization implantation | Jan Hoentschel, Vassilios Papageorgiou | 2010-12-21 |