Issued Patents All Time
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10818557 | Integrated circuit structure to reduce soft-fail incidence and method of forming same | Sipeng Gu, Xinyuan Dou, Sunil Kumar Singh, Ravi Prakash Srivastava, Haiting Wang +1 more | 2020-10-27 |
| 10714380 | Method of forming smooth sidewall structures using spacer materials | Ravi Prakash Srivastava, Sipeng Gu, Sunil Kumar Singh, Xinyuan Dou, Zhiguo Sun | 2020-07-14 |
| 10347528 | Interconnect formation process using wire trench etch prior to via etch, and related interconnect | Sunil Kumar Singh, Ravi Prakash Srivastava, Sipeng Gu | 2019-07-09 |
| 10181420 | Devices with chamfer-less vias multi-patterning and methods for forming chamfer-less vias | Jason E. Stephens, David Permana, Guillaume Bouche, Andy Wei, Mark A. Zaleski +6 more | 2019-01-15 |
| 10134876 | FinFETs with strained channels and reduced on state resistance | Bharat Krishnan, Timothy J. McArdle, Rinus Tek Po Lee, Shishir Ray | 2018-11-20 |
| 10121711 | Planar metrology pad adjacent a set of fins of a fin field effect transistor device | Sipeng Gu, Xiang Hu, Alok Vaid, Lokesh Subramany | 2018-11-06 |
| 9576894 | Integrated circuits including organic interlayer dielectric layers and methods for fabricating the same | Sunil Kumar Singh, Ravi Prakash Srivastava, Xusheng Wu, Teck Jung Tang | 2017-02-21 |
| 9293363 | Methods and structures for back end of line integration | Sunil Kumar Singh, Ravi Prakash Srivastava, Mark A. Zaleski | 2016-03-22 |
| 9281249 | Decoupling measurement of layer thicknesses of a plurality of layers of a circuit structure | Alok Vaid, Abner Bello, Sipeng Gu, Lokesh Subramany, Xiang Hu | 2016-03-08 |
| 9129905 | Planar metrology pad adjacent a set of fins of a fin field effect transistor device | Xiang Hu, Lokesh Subramany, Alok Vaid, Sipeng Gu | 2015-09-08 |
| 9121890 | Planar metrology pad adjacent a set of fins of a fin field effect transistor device | Sipeng Gu, Xiang Hu, Alok Vaid, Lokesh Subramany | 2015-09-01 |
| 9117822 | Methods and structures for back end of line integration | Sunil Kumar Singh, Ravi Prakash Srivastava, Mark A. Zaleski | 2015-08-25 |
| 9105507 | Methods of forming a FinFET semiconductor device with undoped fins | Andy Wei, Seung Kim, Teck Jung Tang, Francis M. Tambwe | 2015-08-11 |
| 9105478 | Devices and methods of forming fins at tight fin pitches | Andy Wei, Mariappan Hariharaputhiran, Dae Geun Yang, Dae-Han Choi, Xiang Hu +1 more | 2015-08-11 |
| 8969932 | Methods of forming a finfet semiconductor device with undoped fins | Andy Wei, Seung Kim, Teck Jung Tang, Francis M. Tambwe | 2015-03-03 |
| 8835233 | FinFET structure with multiple workfunctions and method for fabricating the same | Andy Wei, Bamidele S. Allimi | 2014-09-16 |