Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10236350 | Method, apparatus and system for a high density middle of line flow | Guillaume Bouche, Tuhin Guha Neogi, Sudharshanan Raghunathan, Andy Chi-Hung Wei, Jason E. Stephens +1 more | 2019-03-19 |
| 10181420 | Devices with chamfer-less vias multi-patterning and methods for forming chamfer-less vias | Jason E. Stephens, Guillaume Bouche, Andy Wei, Mark A. Zaleski, Anbu Selvam K M Mahalingam +6 more | 2019-01-15 |
| 9825031 | Methods of forming a high-k contact liner to improve effective via separation distance and the resulting devices | Guillaume Bouche, Andy Wei, Jason E. Stephens, Jagannathan Vasudevan | 2017-11-21 |
| 8183149 | Method of fabricating a conductive interconnect arrangement for a semiconductor device | Ravi Prakash Srivastava, Haifeng Sheng, Dimitri Kioussis | 2012-05-22 |
| 6903000 | System for improving thermal stability of copper damascene structure | Jiong-Ping Lu, Qi-Zhong Hong, Tz-Cheng Chiu, Changming Jin, Ting Tsui | 2005-06-07 |
| 6709974 | Method of preventing seam defects in isolated lines | Jiong-Ping Lu, Albert Cheng, Jeff West, Brock W. Fairchild, Scott Alexander JOHANNESMEYER +3 more | 2004-03-23 |
| 6583053 | Use of a sacrificial layer to facilitate metallization for small features | Jiong-Ping Lu, Changming Jin | 2003-06-24 |