Issued Patents All Time
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11903183 | Conductive line contact regions having multiple multi-direction conductive lines and staircase conductive line contact structures for semiconductor devices | Byung Yoon Kim, Sheng-Wei Yang, Si-Woo Lee | 2024-02-13 |
| 11696432 | Multi-direction conductive line and staircase contact for semiconductor devices | Si-Woo Lee, Byung Yoon Kim, Kyuseok Lee, Sangmin Hwang | 2023-07-04 |
| 10833087 | Semiconductor devices including transistors comprising a charge trapping material, and related systems and methods | Fredrick Fishburn, Haitao Liu, Soichi Sugiura, Oscar O. Enomoto, Keisuke Hirofuji +4 more | 2020-11-10 |
| 10396026 | Precut metal lines | Andy Wei, Guillaume Bouche | 2019-08-27 |
| 10181420 | Devices with chamfer-less vias multi-patterning and methods for forming chamfer-less vias | Jason E. Stephens, David Permana, Guillaume Bouche, Andy Wei, Anbu Selvam K M Mahalingam +6 more | 2019-01-15 |
| 10056373 | Transistor contacts self-aligned in two dimensions | Andy Wei, Guillaume Bouche, Tuhin Guha Neogi, Jason E. Stephens, Jongwook Kye +1 more | 2018-08-21 |
| 9842801 | Self-aligned via and air gap | Andy Wei | 2017-12-12 |
| 9679805 | Self-aligned back end of line cut | Guillaume Bouche, Andy Wei | 2017-06-13 |
| 9660040 | Transistor contacts self-aligned two dimensions | Andy Wei, Guillaume Bouche, Tuhin Guha Neogi, Jason E. Stephens, Jongwook Kye +1 more | 2017-05-23 |
| 9508642 | Self-aligned back end of line cut | Guillaume Bouche, Andy Wei | 2016-11-29 |
| 9502528 | Borderless contact formation through metal-recess dual cap integration | Guillaume Bouche, Jason E. Stephens, Tuhin Guha Neogi, Andy Wei | 2016-11-22 |
| 9461128 | Method for creating self-aligned transistor contacts | Andy Wei, Jason E. Stephens, Tuhin Guha Neogi, Guillaume Bouche | 2016-10-04 |
| 9368395 | Self-aligned via and air gap | Andy Wei | 2016-06-14 |
| 9362162 | Methods of fabricating BEOL interlayer structures | Sunil Kumar Singh, Ravi Prakash Srivastava, Teck Jung Tang | 2016-06-07 |
| 9293363 | Methods and structures for back end of line integration | Sunil Kumar Singh, Ravi Prakash Srivastava, Akshey Sehgal | 2016-03-22 |
| 9263325 | Precut metal lines | Andy Wei, Guillaume Bouche | 2016-02-16 |
| 9236437 | Method for creating self-aligned transistor contacts | Andy Wei, Jason E. Stephens, Tuhin Guha Neogi, Guillaume Bouche | 2016-01-12 |
| 9202751 | Transistor contacts self-aligned in two dimensions | Andy Wei, Guillaume Bouche, Tuhin Guha Neogi, Jason E. Stephens, Jongwook Kye +1 more | 2015-12-01 |
| 9117822 | Methods and structures for back end of line integration | Sunil Kumar Singh, Ravi Prakash Srivastava, Akshey Sehgal | 2015-08-25 |
| 5916011 | Process for polishing a semiconductor device substrate | Sung-Cheol Kim, Rajeev Bajaj | 1999-06-29 |
| 5707492 | Metallized pad polishing process | Charles Stager, Thomas S. Kobayashi, Joseph E. Page, Jr., Paul M. Winebarger | 1998-01-13 |
| 5478436 | Selective cleaning process for fabricating a semiconductor device | Paul M. Winebarger, Troy B. Morrison, Jeffrey Sultemeier | 1995-12-26 |