Issued Patents All Time
Showing 25 most recent of 88 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10559503 | Methods, apparatus and system for a passthrough-based architecture | Guillaume Bouche, Tuhin Guha Neogi, Andy Chi-Hung Wei, Jia Zeng, Jason E. Stephens +3 more | 2020-02-11 |
| 10366917 | Methods of patterning variable width metallization lines | Xuelian Zhu, Jia Zeng, Chenchen Jacob Wang | 2019-07-30 |
| 10347546 | Integrated circuit structure including power rail and tapping wire with method of forming same | Jia Zeng, Wenhui Wang, Xuelian Zhu | 2019-07-09 |
| 10204861 | Structure with local contact for shorting a gate electrode to a source/drain region | Xuelian Zhu, Jia Zeng, Wenhui Wang, Youngtag Woo | 2019-02-12 |
| 10147714 | Method, apparatus, and system for two-dimensional power rail to enable scaling of a standard cell | Yan Wang, Jia Zeng, Chenchen Jacob Wang, Wenhui Wang, Lei Yuan | 2018-12-04 |
| 10056373 | Transistor contacts self-aligned in two dimensions | Andy Wei, Guillaume Bouche, Mark A. Zaleski, Tuhin Guha Neogi, Jason E. Stephens +1 more | 2018-08-21 |
| 9818651 | Methods, apparatus and system for a passthrough-based architecture | Guillaume Bouche, Tuhin Guha Neogi, Andy Chi-Hung Wei, Jia Zeng, Jason E. Stephens +3 more | 2017-11-14 |
| 9798852 | Methods of design rule checking of circuit designs | Lei Yuan, Harry J. Levinson | 2017-10-24 |
| 9727685 | Method, apparatus, and system for improved standard cell design and routing for improving standard cell routability | Lei Yuan, Yan Wang, Chenchen Jacob Wang | 2017-08-08 |
| 9679809 | Method of forming self aligned continuity blocks for mandrel and non-mandrel interconnect lines | Yan Wang, Chenchen Jacob Wang, Wenhui Wang, Lei Yuan, Jia Zeng +1 more | 2017-06-13 |
| 9660040 | Transistor contacts self-aligned two dimensions | Andy Wei, Guillaume Bouche, Mark A. Zaleski, Tuhin Guha Neogi, Jason E. Stephens +1 more | 2017-05-23 |
| 9613177 | Methods of generating circuit layouts that are to be manufactured using SADP routing techniques | Lei Yuan, Soo Han Choi, Harry J. Levinson | 2017-04-04 |
| 9582629 | Methods of generating circuit layouts using self-alligned double patterning (SADP) techniques | Lei Yuan, Li Yang | 2017-02-28 |
| 9536778 | Self-aligned double patterning process for metal routing | Lei Yuan, Harry J. Levinson | 2017-01-03 |
| 9536035 | Wide pin for improved circuit routing | Lei Yuan, Juhan Kim, Mahbub Rashed | 2017-01-03 |
| 9519745 | Method and apparatus for assisted metal routing | Lei Yuan, Irene Y. Lin, Mahbub Rashed | 2016-12-13 |
| 9472464 | Methods to utilize merged spacers for use in fin generation in tapered IC devices | Jia Zeng, Lei Yuan, Youngtag Woo, Yan Wang | 2016-10-18 |
| 9466604 | Metal segments as landing pads and local interconnects in an IC device | Youngtag Woo, Myungjun Lee, Ryan Ryoung-Han Kim | 2016-10-11 |
| 9437481 | Self-aligned double patterning process for two dimensional patterns | Lei Yuan, Jia Zeng, Youngtag Woo | 2016-09-06 |
| 9437588 | Middle of-line architecture for dense library layout using M0 hand-shake | Jia Zeng, Harry J. Levinson | 2016-09-06 |
| 9431300 | MOL architecture enabling ultra-regular cross couple | Jia Zeng, Harry J. Levinson | 2016-08-30 |
| 9400863 | Color-insensitive rules for routing structures | Lei Yuan, Soo Han Choi, Li Yang | 2016-07-26 |
| 9330221 | Mask-aware routing and resulting device | Lei Yuan, Harry J. Levinson | 2016-05-03 |
| 9324722 | Utilization of block-mask and cut-mask for forming metal routing in an IC device | Youngtag Woo, Lei Yuan | 2016-04-26 |
| 9292647 | Method and apparatus for modified cell architecture and the resulting device | Lei Yuan, Mahbub Rashed | 2016-03-22 |