JK

Jongwook Kye

Globalfoundries: 66 patents #30 of 4,424Top 1%
AM AMD: 21 patents #507 of 9,279Top 6%
📍 Pleasanton, CA: #35 of 3,062 inventorsTop 2%
🗺 California: #2,837 of 386,348 inventorsTop 1%
Overall (All Time): #18,864 of 4,157,543Top 1%
88
Patents All Time

Issued Patents All Time

Showing 26–50 of 88 patents

Patent #TitleCo-InventorsDate
9287131 Methods of patterning line-type features using a multiple patterning process that enables the use of tighter contact enclosure spacing rules Lei Yuan, Harry J. Levinson 2016-03-15
9268897 Method for increasing the robustness of a double patterning router used to manufacture integrated circuit devices Lei Yuan, Hidekazu Yoshida, Youngtag Woo 2016-02-23
9202751 Transistor contacts self-aligned in two dimensions Andy Wei, Guillaume Bouche, Mark A. Zaleski, Tuhin Guha Neogi, Jason E. Stephens +1 more 2015-12-01
9159724 Cross-coupling-based design using diffusion contact structures Yan Wang, Yuansheng Ma, Mahbub Rashed 2015-10-13
9158879 Color-insensitive rules for routing structures Lei Yuan, Soo Han Choi, Li Yang 2015-10-13
9147653 Method for off-grid routing structures utilizing self aligned double patterning (SADP) technology Lei Yuan, Harry J. Levinson 2015-09-29
9122830 Wide pin for improved circuit routing Lei Yuan, Juhan Kim, Mahbub Rashed 2015-09-01
9105510 Double sidewall image transfer process Youngtag Woo, Dinesh Somasekhar 2015-08-11
9041087 Semiconductor devices having dielectric caps on contacts and related fabrication methods Lei Yuan, Jin Cho 2015-05-26
9035679 Standard cell connection for circuit routing Lei Yuan, Mahbub Rashed, Irene Y. Lin 2015-05-19
9006100 Middle-of-the-line constructs using diffusion contact structures Mahbub Rashed, Yuansheng Ma, Irene Y. Lin, Jason E. Stephens, Yunfei Deng +5 more 2015-04-14
8966412 Methods of generating circuit layouts that are to be manufactured using SADP techniques Lei Yuan, Harry J. Levinson 2015-02-24
8966423 Integrating optimal planar and three-dimensional semiconductor design layouts Navneet Jain, Yunfei Deng, Mahbub Rashed, David Doman, Qi Xiang 2015-02-24
8962483 Interconnection designs using sidewall image transfer (SIT) Youngtag Woo, Dinesh Somasekhar, Juhan Kim, Yunfei Deng 2015-02-24
8954913 Methods of generating circuit layouts that are to be manufactured using SADP routing techniques and virtual non-mandrel mask rules Lei Yuan, Soo Han Choi, Harry J. Levinson 2015-02-10
8921225 Method for off-grid routing structures utilizing self aligned double patterning (SADP) technology Lei Yuan, Harry J. Levinson 2014-12-30
8918746 Cut mask aware contact enclosure rule for grating and cut patterning solution Lei Yuan, Harry J. Levinson 2014-12-23
8916441 FinFET device and methods of fabrication Mahbub Rashed, Juhan Kim, Yunfei Deng, Suresh Venkatesan 2014-12-23
8889561 Double sidewall image transfer process Youngtag Woo, Dinesh Somasekhar 2014-11-18
8881083 Methods for improving double patterning route efficiency Yunfei Deng, Lei Yuan, Hidekazu Yoshida, Juhan Kim, Mahbub Rashed 2014-11-04
8843869 Via insertion in integrated circuit (IC) designs Lei Yuan, Harry J. Levinson 2014-09-23
8839168 Self-aligned double patterning via enclosure design Harry J. Levinson, Jason E. Stephens, Lei Yuan 2014-09-16
8815748 Method of forming semiconductor device with multiple level patterning Thomas I. Wallow, Ryoung-Han Kim, Harry J. Levinson 2014-08-26
8809184 Methods of forming contacts for semiconductor devices using a local interconnect processing scheme Lei Yuan, Jin Cho, Harry J. Levinson 2014-08-19
8802574 Methods of making jogged layout routings double patterning compliant Lei Yuan 2014-08-12