Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12411405 | Optical proximity correction based on combining inverse lithography technology with pattern classification | Le Hong, Rui Wu, Junjiang Lei | 2025-09-09 |
| 10311165 | Guiding patterns optimization for directed self-assembly | Junjiang Lei, Le Hong | 2019-06-04 |
| 9836556 | Optical proximity correction for directed-self-assembly guiding patterns | Junjiang Lei, Le Hong | 2017-12-05 |
| 9330228 | Generating guiding patterns for directed self-assembly | Juan Andres Torres Robles, Joydeep Mitra, Krasnova Polina Andreevna, Yuri Granik | 2016-05-03 |
| 9159724 | Cross-coupling-based design using diffusion contact structures | Yan Wang, Jongwook Kye, Mahbub Rashed | 2015-10-13 |
| 9142513 | Middle-of-the-line constructs using diffusion contact structures | Mahbub Rashed, Irene Y. Lin, Jason E. Stephens, Yunfei Deng, Yuan Lei +5 more | 2015-09-22 |
| 9006100 | Middle-of-the-line constructs using diffusion contact structures | Mahbub Rashed, Irene Y. Lin, Jason E. Stephens, Yunfei Deng, Yuan Lei +5 more | 2015-04-14 |
| 8741763 | Layout designs with via routing structures | Jongwook Kye, Harry J. Levinson, Hidekazu Yoshida, Mahbub Rashed | 2014-06-03 |
| 8679911 | Cross-coupling-based design using diffusion contact structures | Yan Wang, Jongwook Kye, Mahbub Rashed | 2014-03-25 |
| 8598633 | Semiconductor device having contact layer providing electrical connections | Marc Tarabbia, James B. Gullette, Mahbub Rashed, David Doman, Irene Y. Lin +12 more | 2013-12-03 |
| 8581348 | Semiconductor device with transistor local interconnects | Mahbub Rashed, Steven R. Soss, Jongwook Kye, Irene Y. Lin, James B. Gullette +9 more | 2013-11-12 |
| 8367430 | Shape characterization with elliptic fourier descriptor for contact or any closed structures on the chip | Harry J. Levinson, Jongwook Kye | 2013-02-05 |
| 8067252 | Method for determining low-noise power spectral density for characterizing line edge roughness in semiconductor wafer processing | Harry J. Levinson, Thomas I. Wallow | 2011-11-29 |
| 7861195 | Process for design of semiconductor circuits | Darin A. Chan, Yi Zou, Marilyn I. Wright, Mark W. Michael | 2010-12-28 |