Issued Patents All Time
Showing 25 most recent of 109 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11424253 | Device including a floating gate electrode and a layer of ferroelectric material and method for the formation thereof | Johannes Mueller, Stefan Mueller | 2022-08-23 |
| 10340380 | Three-dimensional transistor with improved channel mobility | Jan Hoentschel, Ralf Richter, Peter Javorka | 2019-07-02 |
| 10084057 | NVM device in SOI technology and method of fabricating an according device | Sven Beyer, Martin Trentzsch, Axel Henke | 2018-09-25 |
| 10056376 | Ferroelectric FinFET | Ralf Illgen, Jan Hoentschel | 2018-08-21 |
| 9966466 | Semiconductor-on-insulator wafer, semiconductor structure including a transistor, and methods for the formation and operation thereof | Ralf Illgen | 2018-05-08 |
| 9899417 | Semiconductor structure including a first transistor and a second transistor | Ralf Illgen | 2018-02-20 |
| 9865608 | Method of forming a device including a floating gate electrode and a layer of ferroelectric material | Johannes Mueller, Stefan Mueller | 2018-01-09 |
| 9685457 | Method including a formation of a transistor and semiconductor structure including a first transistor and a second transistor | Ralf Illgen | 2017-06-20 |
| 9583240 | Temperature independent resistor | Ralf Illgen, Jan Hoentschel | 2017-02-28 |
| 9515155 | E-fuse design for high-K metal-gate technology | Roman Boschke, Maciej Wiatr, Christian Schippel | 2016-12-06 |
| 9490344 | Methods of making transistor devices with elevated source/drain regions to accommodate consumption during metal silicide formation process | Jan Hoentschel, Thilo Scheiper | 2016-11-08 |
| 9490361 | Canyon gate transistor and methods for its fabrication | Thilo Scheiper | 2016-11-08 |
| 9484407 | Methods of forming a nanowire transistor device | Tim Baldauf | 2016-11-01 |
| 9472642 | Method of forming a semiconductor device structure and such a semiconductor device structure | Jan Hoentschel, Ralf Richter, Peter Javorka | 2016-10-18 |
| 9449972 | Ferroelectric FinFET | Ralf Illgen, Jan Hoentschel | 2016-09-20 |
| 9443945 | Transistor including a gate electrode extending all around one or more channel regions | Jan Hoentschel | 2016-09-13 |
| 9431508 | Simplified gate-first HKMG manufacturing flow | Jan Hoentschel, Roman Boschke | 2016-08-30 |
| 9425194 | Transistor devices with high-k insulation layers | Martin Gerhardt, Matthias Kessler | 2016-08-23 |
| 9425318 | Integrated circuits with fets having nanowires and methods of manufacturing the same | Jan Hoentschel, Gerd Zschaetzsch | 2016-08-23 |
| 9412859 | Contact geometry having a gate silicon length decoupled from a transistor length | Ralf Richter, Peter Javorka, Jan Hoentschel | 2016-08-09 |
| 9412848 | Methods of forming a complex GAA FET device at advanced technology nodes | Ralf Richter, Peter Javorka, Jan Hoentschel | 2016-08-09 |
| 9401423 | Enhancing transistor performance and reliability by incorporating deuterium into a strained capping layer | Peter Javorka | 2016-07-26 |
| 9391176 | Multi-gate FETs having corrugated semiconductor stacks and method of forming the same | Jan Hoentschel, Ralf Richter, Peter Javorka | 2016-07-12 |
| 9373720 | Three-dimensional transistor with improved channel mobility | Jan Hoentschel, Ralf Richter, Peter Javorka | 2016-06-21 |
| 9373509 | FINFET doping method with curvilnear trajectory implantation beam path | Ralf Richter, Peter Javorka, Jan Hoentschel | 2016-06-21 |