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Porous low-k dielectric etch |
Eric A. Hudson, Sonny Li, Chia-Chun Wang, Prabhakara Gopaladasu, Zihao Ouyang |
2019-07-23 |
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Integrated etch/clean for dielectric etch applications |
Reza Arghavani, Eric A. Hudson, Tom A. Kamp, Samantha Tan, Gerardo Delgadino |
2016-07-19 |
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Methodology for cleaning of surface metal contamination from an upper electrode used in a plasma chamber |
Hong Shih, Armen Avoyan, David Carman |
2015-07-14 |
| 8956500 |
Methods to eliminate “M-shape” etch rate profile in inductively coupled plasma reactor |
Stephen Yuen, Kyeong-Tae Lee, Valentin N. Todorow, Tae Won Kim, Anisul Khan |
2015-02-17 |
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Etching high K dielectrics with high selectivity to oxide containing layers at elevated temperatures with BC13 based etch chemistries |
Radhika Mani, Nicolas Gani, Wei Liu, Meihua Shen |
2014-05-13 |
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Methods for high temperature etching a high-K material gate structure |
Wei Liu, Eiichi Matsusue, Meihua Shen, Anh Phan, David Palagashvili +4 more |
2013-08-06 |
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Shallow trench isolation etch process |
Hiroki Sasano, Meihua Shen, Radhika Mani, Sunil Srinivasan, Daehee Weon +2 more |
2012-03-13 |
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Alternative method for advanced CMOS logic gate etch applications |
Nicolas Gani, Meihua Shen |
2011-03-22 |
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Device and method for etching flash memory gate stacks comprising high-k dielectric |
Meihua Shen, Xikun Wang, Wei Liu, Yan Du |
2010-08-24 |
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Pulsed-plasma system with pulsed reaction gas replenish for etching semiconductors structures |
Tae Won Kim, Kyeong-Tae Lee, Alexander Paterson, Valentin N. Todorow |
2010-08-10 |
| 7754610 |
Process for etching tungsten silicide overlying polysilicon particularly in a flash memory |
Kyeong-Tae Lee, Jinhan Choi, Bi Jang, Meihua Shen, Thorsten Lill +1 more |
2010-07-13 |
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Pulsed-plasma system for etching semiconductor structures |
Tae Won Kim, Kyeong-Tae Lee, Alexander Paterson, Valentin N. Todorow |
2010-06-15 |
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Pulsed-plasma system with pulsed sample bias for etching semiconductor substrates |
Tae Won Kim, Kyeong-Tae Lee, Alexander Paterson, Valentin Todorov |
2010-05-18 |
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Method of pattern etching a silicon-containing hard mask |
Yan Du, Meihua Shen |
2009-03-17 |
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Method of fabricating a gate structure of a field effect transistor having a metal-containing gate electrode |
Jinhan Choi, Sang In Yi, Kyeong-Tae Lee |
2008-05-06 |
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Controlled polymerization on plasma reactor wall |
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2006-10-17 |
| 6924088 |
Method and system for realtime CD microloading control |
David Mui, Wei Liu, Hiroki Sasano |
2005-08-02 |
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Etching method having high silicon-to-photoresist selectivity |
Yung-Hee Yvette Lee |
2005-07-26 |
| 6653237 |
High resist-selectivity etch for silicon trench etch applications |
David Mui, Jeffrey D. Chinn, Dragan Podlesnik |
2003-11-25 |
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Method for etching polysilicon to have a smooth surface |
Jitske Trevor, Jeff Chinn |
2002-06-11 |
| 6235214 |
Plasma etching of silicon using fluorinated gas mixtures |
Jeffrey D. Chinn |
2001-05-22 |
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Electrostatic chuck having a thermal transfer regulator pad |
Ralph Wadensweiler, Ajay Kumar, Weinan Jiang, Rolf Guenther |
1999-11-02 |
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Apparatus for measuring pedestal temperature in a semiconductor wafer processing system |
Ajay Kumar, Jeffrey D. Chinn, Weinan Jiang, Brian Duda, Rolf Guenther +3 more |
1999-04-13 |
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Method for etching transistor gates using a hardmask |
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1998-12-22 |
