Issued Patents All Time
Showing 51–75 of 244 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11049797 | Method for manufacturing a semiconductor structure comprising a semiconductor device layer formed on a tem, porary substrate having a graded SiGe etch stop layer therebetween | Yu-Hung Cheng, Shih Pei Chou, Alexander Kalnitsky, Tung-I Lin, Wei-Li Chen | 2021-06-29 |
| 11037978 | Dual facing BSI image sensors with wafer level stacking | Ping-Yin Liu, Chia-Shiung Tsai, Xiaomeng Chen, Pin-Nan Tseng | 2021-06-15 |
| 10998364 | Image sensor scheme for optical and electrical improvement | Sheng-Chan Li, Cheng-Hsien Chou, Cheng-Yuan Tsai, Keng-Yu Chou | 2021-05-04 |
| 10971534 | Image sensor having improved full well capacity and related method of formation | Yu-Hung Cheng, Shyh-Fann Ting, Yen-Ting Chiang, Min-Ying Tsai | 2021-04-06 |
| 10971406 | Method of forming source/drain regions of transistors | Yu-Hung Cheng, Ching-Wei Tsai, Tung-I Lin, Wei-Li Chen | 2021-04-06 |
| 10964746 | Deep trench isolation shrinkage method for enhanced device performance | Cheng-Hsien Chou, Shih Pei Chou, Chih-Yu Lai, Sheng-Chau Chen, Chih-Ta Chen +1 more | 2021-03-30 |
| 10950631 | Semiconductor-on-insulator wafer having a composite insulator layer | Kuan-Liang Liu | 2021-03-16 |
| 10930547 | Semiconductor structure and manufacturing method thereof | Min-Ying Tsai | 2021-02-23 |
| 10923503 | Semiconductor-on-insulator (SOI) substrate comprising a trap-rich layer with small grain sizes | Yu-Hung Cheng, Cheng-Ta Wu, Min-Ying Tsai, Alex Usenko | 2021-02-16 |
| 10889097 | Wafer debonding system and method | Chang-Chen Tsao, Kuo-Liang Lu, Ru-Liang Lee, Sheng-Hsiang Chuang, Yu-Hung Cheng +1 more | 2021-01-12 |
| 10868156 | Method of forming epitaxial silicon layer and semiconductor device thereof | Yu-Hung Cheng, Po-Jung Chiang, Yen-Hsiu Chen | 2020-12-15 |
| 10868058 | Photodiode gate dielectric protection layer | Cheng-Hsien Chou, Wen-I Hsu, Tsun-Kai Tsao, Chih-Yu Lai, Jiech-Fun Lu | 2020-12-15 |
| 10868050 | Backside illuminated image sensor with negatively charged layer | Shyh-Fann Ting, Chih-Yu Lai, Cheng-Ta Wu, Ching-Chun Wang | 2020-12-15 |
| 10867834 | Semiconductor structure and manufacturing method thereof | Min-Ying Tsai | 2020-12-15 |
| 10847560 | BSI image sensor and method of forming same | Hung-Wen Hsu, Jiech-Fun Lu, U-Ting Chen, Shu-Ting Tsai, Hsiu-Yu Cheng | 2020-11-24 |
| 10840287 | 3DIC interconnect apparatus and method | Shih Pei Chou, Hung-Wen Hsu, Ching-Chung Su, Chun-Han Tsao, Chia-Chieh Lin +4 more | 2020-11-17 |
| 10790189 | 3D integrated circuit and methods of forming the same | Hsun-Chung Kuang, Yen-Chang Chu, Cheng-Tai Hsiao, Ping-Yin Liu, Lan-Lin Chao +2 more | 2020-09-29 |
| 10756222 | Backside illuminated photo-sensitive device with gradated buffer layer | Yu-Hung Cheng, Chia-Shiung Tsai, Cheng-Ta Wu, Xiaomeng Chen, Yen-Chang Chu | 2020-08-25 |
| 10748948 | Image sensor device and method | Yen-Chang Chu, Cheng-Yuan Tsai | 2020-08-18 |
| 10727097 | Mechanisms for cleaning substrate surface for hybrid bonding | Sheng-Chau Chen, Chih-Hui Huang, Cheng-Ta Wu, Chia-Shiung Tsai, Xiao-Meng Chen | 2020-07-28 |
| 10714600 | Bipolar junction transistor (BJT) base conductor pullback | Lih-Tien Shyu | 2020-07-14 |
| 10665456 | Semiconductor structure | Shih Pei Chou, Chen-Fa Lu, Jiech-Fun Lu, Chia-Shiung Tsai | 2020-05-26 |
| 10658474 | Method for forming thin semiconductor-on-insulator (SOI) substrates | Cheng-Ta Wu, Chia-Shiung Tsai, Jiech-Fun Lu, Kuo-Hwa Tzeng, Shih Pei Chou +1 more | 2020-05-19 |
| 10658410 | Image sensor having improved full well capacity and related method of formation | Yu-Hung Cheng, Shyh-Fann Ting, Yen-Ting Chiang, Min-Ying Tsai | 2020-05-19 |
| 10636688 | Method for alignment, process tool and method for wafer-level alignment | Ching-Hung Wang, Ping-Yin Liu, Yeong-Jyh Lin | 2020-04-28 |