GG

Glenn A. Glass

IN Intel: 165 patents #82 of 30,777Top 1%
DP Daedalus Prime: 5 patents #1 of 21Top 5%
TR Tahoe Research: 2 patents #16 of 215Top 8%
Motorola: 1 patents #6,475 of 12,470Top 55%
📍 Portland, OR: #38 of 9,213 inventorsTop 1%
🗺 Oregon: #78 of 28,073 inventorsTop 1%
Overall (All Time): #4,585 of 4,157,543Top 1%
173
Patents All Time

Issued Patents All Time

Showing 51–75 of 173 patents

Patent #TitleCo-InventorsDate
11171058 Self-aligned 3-D epitaxial structures for MOS device fabrication Daniel B. Aubertine, Anand S. Murthy, Gaurav Thareja, Tahir Ghani 2021-11-09
11152361 Techniques for achieving multiple transistor fin dimensions on a single die Anand S. Murthy 2021-10-19
11121030 Transistors employing carbon-based etch stop layer for preserving source/drain material during contact trench etch Anand S. Murthy, Karthik Jambunathan, Benjamin Chu-Kung, Seung Hoon Sung, Jack T. Kavalieros +1 more 2021-09-14
11107920 Methods of forming dislocation enhanced strain in NMOS structures Michael Jackson, Anand S. Murthy, Saurabh Morarka, Chandra S. Mohapatra 2021-08-31
11101356 Doped insulator cap to reduce source/drain diffusion for germanium NMOS transistors Anand S. Murthy, Karthik Jambunathan, Cory Bomberger, Tahir Ghani, Jack T. Kavalieros +3 more 2021-08-24
11101350 Integrated circuit with germanium-rich channel transistors including one or more dopant diffusion barrier elements Anand S. Murthy, Karthik Jambunathan, Benjamin Chu-Kung, Seung Hoon Sung, Jack T. Kavalieros +2 more 2021-08-24
11094785 Deuterium-based passivation of non-planar transistor interfaces Prashant Majhi, Anand S. Murthy, Tahir Ghani, Aravind S. Killampalli, Mark R. Brazier +1 more 2021-08-17
11081570 Transistors with lattice matched gate structure Karthik Jambunathan, Anand S. Murthy, Jack T. Kavalieros, Seung Hoon Sung, Benjamin Chu-Kung +1 more 2021-08-03
11069795 Transistors with channel and sub-channel regions with distinct compositions and dimensions Karthik Jambunathan, Anand S. Murthy, Jun Sung Kang, Bruce Beattie, Anupama Bowonder +3 more 2021-07-20
11056592 Silicon substrate modification to enable formation of thin, relaxed, germanium-based layer Karthik Jambunathan, Cory Bomberger, Anand S. Murthy, Ju H. Nam, Tahir Ghani 2021-07-06
11024737 Etching fin core to provide fin doubling Chandra S. Mohapatra, Anand S. Murthy, Karthik Jambunathan 2021-06-01
11024713 Gradient doping to lower leakage in low band gap material devices Seung Hoon Sung, Dipanjan Basu, Harold W. Kennel, Ashish Agrawal, Benjamin Chu-Kung +3 more 2021-06-01
11011620 Techniques for increasing channel region tensile strain in n-MOS devices Rishabh Mehandru, Cory E. Weber, Anand S. Murthy, Karthik Jambunathan, Jiong Zhang +2 more 2021-05-18
11004978 Methods of forming doped source/drain contacts and structures formed thereby Karthik Jambunathan, Anand S. Murthy, Chandra S. Mohapatra, Seiyon Kim 2021-05-11
11004954 Epitaxial buffer to reduce sub-channel leakage in MOS transistors Karthik Jambunathan, Anand S. Murthy, Jack T. Kavalieros, Seung Hoon Sung, Benjamin Chu-Kung +1 more 2021-05-11
10998270 Local interconnect for group IV source/drain regions Seung Hoon Sung, Van H. Le, Ashish Agrawal, Benjamin Chu-Kung, Anand S. Murthy +1 more 2021-05-04
10985263 Thin film cap to lower leakage in low band gap material devices Seung Hoon Sung, Dipanjan Basu, Ashish Agrawal, Van H. Le, Benjamin Chu-Kung +4 more 2021-04-20
10978568 Passivation of transistor channel region interfaces Mark R. Brazier, Anand S. Murthy, Tahir Ghani, Owen Loh 2021-04-13
10944006 Geometry tuning of fin based transistor Anand S. Murthy, Karthik Jambunathan, Chandra S. Mohapatra, Hei Kam, Nabil G. Mistkawi +2 more 2021-03-09
10930738 Sub-fin leakage control in semicondcutor devices Dipanjan Basu, Seung Hoon Sung, Jack T. Kavalieros, Tahir Ghani 2021-02-23
10892337 Backside source/drain replacement for semiconductor devices with metallization on both sides Karthik Jambunathan, Anand S. Murthy, Chandra S. Mohapatra, Patrick Morrow, Mauro J. Kobrinsky 2021-01-12
10886408 Group III-V material transistors employing nitride-based dopant diffusion barrier layer Chandra S. Mohapatra, Harold W. Kennel, Willy Rachmady, Anand S. Murthy, Gilbert Dewey +4 more 2021-01-05
10879241 Techniques for controlling transistor sub-fin leakage Prashant Majhi, Anand S. Murthy, Tahir Ghani, Daniel B. Aubertine, Heidi M. Meyer +2 more 2020-12-29
10879353 Selective germanium P-contact metalization through trench Anand S. Murthy, Tahir Ghani 2020-12-29
10854752 High mobility strained channels for fin-based NMOS transistors Stephen M. Cea, Roza Kotlyar, Harold W. Kennel, Anand S. Murthy, Willy Rachmady +1 more 2020-12-01