Issued Patents All Time
Showing 26–50 of 173 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11538905 | Nanowire transistors employing carbon-based layers | Anand S. Murthy, Nabil G. Mistkawi, Karthik Jambunathan, Tahir Ghani | 2022-12-27 |
| 11527612 | Gate-all-around integrated circuit structures having vertically discrete source or drain structures | Anand S. Murthy, Biswajeet Guha, Dax M. Crum, Sean T. Ma, Tahir Ghani +3 more | 2022-12-13 |
| 11515304 | Integrated circuit devices with non-collapsed fins and methods of treating the fins to prevent fin collapse | Nabil G. Mistkawi | 2022-11-29 |
| 11515407 | High breakdown voltage structure for high performance GaN-based HEMT and MOS devices to enable GaN C-MOS | Sansaptak Dasgupta, Han Wui Then, Marko Radosavljevic, Paul B. Fischer, Anand S. Murthy +1 more | 2022-11-29 |
| 11508813 | Column IV transistors for PMOS integration | Anand S. Murthy | 2022-11-22 |
| 11482618 | Methods of forming dislocation enhanced strain in NMOS and PMOS structures | Michael Jackson, Anand S. Murthy, Saurabh Morarka, Chandra S. Mohapatra | 2022-10-25 |
| 11476344 | Contact resistance reduction employing germanium overlayer pre-contact metalization | Anand S. Murthy, Tahir Ghani | 2022-10-18 |
| 11469299 | Gate-all-around integrated circuit structures having underlying dopant-diffusion blocking layers | Anand S. Murthy, Biswajeet Guha, Dax M. Crum, Patrick H. Keys, Tahir Ghani +2 more | 2022-10-11 |
| 11450739 | Germanium-rich nanowire transistor with relaxed buffer layer | Anand S. Murthy, Cory Bomberger, Tahir Ghani, Jack T. Kavalieros, Siddharth Chouksey +3 more | 2022-09-20 |
| 11450738 | Source/drain regions in integrated circuit structures | Sean T. Ma, Anand S. Murthy, Biswajeet Guha | 2022-09-20 |
| 11444166 | Backside source/drain replacement for semiconductor devices with metallization on both sides | Karthik Jambunathan, Anand S. Murthy, Chandra S. Mohapatra, Patrick Morrow, Mauro J. Kobrinsky | 2022-09-13 |
| 11437472 | Integrated circuit structures having germanium-based channels | Siddharth Chouksey, Anand S. Murthy, Harold W. Kennel, Jack T. Kavalieros, Tahir Ghani +2 more | 2022-09-06 |
| 11417655 | High-mobility semiconductor source/drain spacer | Gilbert Dewey, Matthew V. Metz, Anand S. Murthy, Tahir Ghani, Willy Rachmady +2 more | 2022-08-16 |
| 11411110 | Methods of forming dislocation enhanced strain in NMOS and PMOS structures | Michael Jackson, Anand S. Murthy, Saurabh Morarka, Chandra S. Mohapatra | 2022-08-09 |
| 11404575 | Diverse transistor channel materials enabled by thin, inverse-graded, germanium-based layer | Karthik Jambunathan, Cory Bomberger, Anand S. Murthy, Ju H. Nam, Tahir Ghani | 2022-08-02 |
| 11387320 | Transistors with high concentration of germanium | Anand S. Murthy, Tahir Ghani, Ravi Pillarisetty, Niloy Mukherjee, Jack T. Kavalieros +3 more | 2022-07-12 |
| 11335600 | Integration method for finfet with tightly controlled multiple fin heights | Seiyon Kim, Jack T. Kavalieros, Anand S. Murthy, Karthik Jambunathan | 2022-05-17 |
| 11296079 | PMOS and NMOS contacts in common trench | Anand S. Murthy | 2022-04-05 |
| 11251281 | Contact resistance reduction employing germanium overlayer pre-contact metalization | Anand S. Murthy, Tahir Ghani | 2022-02-15 |
| 11233148 | Reducing band-to-band tunneling in semiconductor devices | Benjamin Chu-Kung, Jack T. Kavalieros, Seung Hoon Sung, Siddharth Chouksey, Harold W. Kennel +4 more | 2022-01-25 |
| 11232948 | Layered substrate for microelectronic devices | Anand S. Murthy | 2022-01-25 |
| 11222977 | Source/drain diffusion barrier for germanium NMOS transistors | Anand S. Murthy, Karthik Jambunathan, Cory Bomberger, Tahir Ghani, Jack T. Kavalieros +3 more | 2022-01-11 |
| 11195919 | Method of fabricating a semiconductor device with strained SiGe fins and a Si cladding layer | Stephen M. Cea, Roza Kotlyar, Harold W. Kennel, Anand S. Murthy, Kelin J. Kuhn +1 more | 2021-12-07 |
| 11189730 | Non-selective epitaxial source/drain deposition to reduce dopant diffusion for germanium nMOS transistors | Anand S. Murthy, Karthik Jambunathan, Cory Bomberger, Tahir Ghani, Jack T. Kavalieros +3 more | 2021-11-30 |
| 11171058 | Self-aligned 3-D epitaxial structures for MOS device fabrication | Daniel B. Aubertine, Anand S. Murthy, Gaurav Thareja, Tahir Ghani | 2021-11-09 |