Issued Patents All Time
Showing 676–700 of 1,139 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10312154 | Method of forming vertical FinFET device having self-aligned contacts | Steven Bentley, Puneet Harischandra Suvarna, Chanro Park, Min Gyu Sung, Lars Liebmann +2 more | 2019-06-04 |
| 10304833 | Method of forming complementary nano-sheet/wire transistor devices with same depth contacts | Puneet Harischandra Suvarna, Bipul C. Paul, Bartlomiej Jan Pawlak, Lars Liebmann, Daniel Chanemougame +2 more | 2019-05-28 |
| 10304832 | Integrated circuit structure incorporating stacked field effect transistors and method | Daniel Chanemougame, Lars Liebmann | 2019-05-28 |
| 10304747 | Dual liner silicide | Balasubramanian Pranatharthiharan, Chun-Chen Yeh | 2019-05-28 |
| 10304741 | Source and drain epitaxial semiconductor material integration for high voltage semiconductor devices | Balasubramanian Pranatharthiharan, Junli Wang | 2019-05-28 |
| 10297664 | Nanosheet transistor with uniform effective gate length | — | 2019-05-21 |
| 10297597 | Composite isolation structures for a fin-type field effect transistor | Min Gyu Sung, Chanro Park, Murat Kerem Akarvardar | 2019-05-21 |
| 10297506 | HDP fill with reduced void formation and spacer damage | Huiming Bu, Andrew M. Greene, Balasubramanian Pranatharthiharan | 2019-05-21 |
| 10297504 | Methods of forming a gate structure-to-source/drain conductive contact and the resulting devices | Hui Zang, Keith H. Tabakman | 2019-05-21 |
| 10297452 | Methods of forming a gate contact structure for a transistor | Hui Zang, Kangguo Cheng, Tenko Yamashita, Chun-Chen Yeh | 2019-05-21 |
| 10290738 | Methods of forming epi semiconductor material on a recessed fin in the source/drain regions of a FinFET device | Christopher M. Prindle, Kwan-Yong Lim | 2019-05-14 |
| 10290636 | Semiconductor device having fins with in-situ doped, punch-through stopper layer and related methods | Qing Liu, Chun-Chen Yeh, Xiuyu Cai | 2019-05-14 |
| 10290549 | Integrated circuit structure, gate all-around integrated circuit structure and methods of forming same | Julien Frougier, Min Gyu Sung, Edward J. Nowak, Nigel G. Cave, Lars Liebmann +2 more | 2019-05-14 |
| 10290544 | Methods of forming conductive contact structures to semiconductor devices and the resulting structures | Lars Liebmann, Daniel Chanemougame, Chanro Park | 2019-05-14 |
| 10283621 | Method of forming vertical field effect transistors with self-aligned gates and gate extensions and the resulting structure | Lars Liebmann, Hui Zang, Steven Bentley | 2019-05-07 |
| 10283617 | Hybrid spacer integration for field-effect transistors | Dong-Ick Lee, Min Gyu Sung, Chanro Park | 2019-05-07 |
| 10283408 | Middle of the line (MOL) contacts with two-dimensional self-alignment | Chanro Park, Andre P. Labonte, Lars Liebmann | 2019-05-07 |
| 10283407 | Two-dimensional self-aligned super via integration on self-aligned gate contact | Cheng Chi | 2019-05-07 |
| 10276689 | Method of forming a vertical field effect transistor (VFET) and a VFET structure | Yi Qi, Jianwei Peng, Hsien-Ching Lo, Xunyuan Zhang, Hui Zang | 2019-04-30 |
| 10276683 | Common metal contact regions having different Schottky barrier heights and methods of manufacturing same | Tek Po Rinus Lee, Jinping Liu | 2019-04-30 |
| 10276659 | Air gap adjacent a bottom source/drain region of vertical transistor device | Chun-Chen Yeh, Kangguo Cheng, Tenko Yamashita | 2019-04-30 |
| 10276573 | FinFET including tunable fin height and tunable fin width ratio | Xiuyu Cai, Qing Liu, Chun-Chen Yeh | 2019-04-30 |
| 10276442 | Wrap-around contacts formed with multiple silicide layers | Julien Frougier, Kangguo Cheng, Adra Carr, Nicolas Loubet | 2019-04-30 |
| 10276391 | Self-aligned gate caps with an inverted profile | Hui Zang, Laertis Economikos | 2019-04-30 |
| 10269983 | Stacked nanosheet field-effect transistor with air gap spacers | Julien Frougier, Hui Zang, Kangguo Cheng, Tenko Yamashita, Chun-Chen Yeh | 2019-04-23 |