Issued Patents All Time
Showing 651–675 of 1,139 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10381459 | Transistors with H-shaped or U-shaped channels and method for forming the same | Julien Frougier, Yi Qi, Nigel G. Cave, Edward J. Nowak, Andreas Knorr | 2019-08-13 |
| 10381273 | Vertically stacked multi-channel transistor structure | Kangguo Cheng, Tenko Yamashita, Chun-Chen Yeh | 2019-08-13 |
| 10374064 | Fin field effect transistor complementary metal oxide semiconductor with dual strained channels with solid phase doping | Kangguo Cheng, Tenko Yamashita | 2019-08-06 |
| 10374040 | Method to form low resistance contact | Daniel Chanemougame, Lars Liebmann | 2019-08-06 |
| 10373875 | Contacts formed with self-aligned cuts | Daniel Jaeger, Chanro Park, Laertis Economikos, Haiting Wang, Hui Zang | 2019-08-06 |
| 10373873 | Gate cut in replacement metal gate process | Chanro Park, Kangguo Cheng, Laertis Economikos | 2019-08-06 |
| 10367069 | Fabrication of vertical field effect transistor structure with controlled gate length | Kangguo Cheng, Tenko Yamashita, Chun-Chen Yeh | 2019-07-30 |
| 10366931 | Nanosheet devices with CMOS epitaxy and method of forming | Cheng Chi, Pietro Montanini, Tenko Yamashita, Nicolas Loubet | 2019-07-30 |
| 10366930 | Self-aligned gate cut isolation | Chanro Park, Min Gyu Sung, Kangguo Cheng, Guillaume Bouche | 2019-07-30 |
| 10361311 | Semiconductor structure including low-k spacer material | Xiuyu Cai, Kangguo Cheng, Ali Khakifirooz | 2019-07-23 |
| 10361315 | Method and apparatus of fabricating source and drain epitaxy for vertical field effect transistor | Chun-Chen Yeh, Kangguo Cheng, Tenko Yamashita, Cheng Chi, Chen Zhang | 2019-07-23 |
| 10355020 | FinFETs having strained channels, and methods of fabricating finFETs having strained channels | Qing Liu, Xiuyu Cai, Chun-Chen Yeh | 2019-07-16 |
| 10355086 | High doped III-V source/drain junctions for field effect transistors | Xiuyu Cai, Qing Liu, Kejia Wang, Chun-Chen Yeh | 2019-07-16 |
| 10347749 | Reducing bending in parallel structures in semiconductor fabrication | Balasubramanian Pranatharthiharan, Pietro Montanini, John R. Sporre | 2019-07-09 |
| 10347719 | Nanosheet transistors on bulk material | Kangguo Cheng, Tenko Yamashita, Chun-Chen Yeh | 2019-07-09 |
| 10340362 | Spacers for tight gate pitches in field effect transistors | Chun-Chen Yeh | 2019-07-02 |
| 10340189 | Source and drain epitaxial semiconductor material integration for high voltage semiconductor devices | Balasubramanian Pranatharthiharan, Junli Wang | 2019-07-02 |
| 10332963 | Uniformity tuning of variable-height features formed in trenches | — | 2019-06-25 |
| 10332961 | Inner spacer for nanosheet transistors | Kangguo Cheng, Tenko Yamashita, Chun-Chen Yeh | 2019-06-25 |
| 10332803 | Hybrid gate-all-around (GAA) field effect transistor (FET) structure and method of forming | Edward J. Nowak, Bipul C. Paul, Steven R. Soss, Julien Frougier, Daniel Chanemougame +1 more | 2019-06-25 |
| 10332745 | Dummy assist features for pattern support | Lei Sun, Wenhui Wang, Yulu Chen, Erik Verduijn, Zhengqing John Qi +2 more | 2019-06-25 |
| 10326002 | Self-aligned gate contact and cross-coupling contact formation | Hui Zang, Scott Beasor, Zhenyu Hu | 2019-06-18 |
| 10325848 | Self-aligned local interconnect technology | Andrew M. Greene, Injo Ok, Balasubramanian Pranatharthiharan, Charan V. V. S. Surisetty | 2019-06-18 |
| 10319731 | Integrated circuit structure having VFET and embedded memory structure and method of forming same | Chun-Chen Yeh, Tenko Yamashita, Kangguo Cheng | 2019-06-11 |
| 10319627 | Air-gap spacers for field-effect transistors | Chanro Park, Min Gyu Sung, Hoon Kim | 2019-06-11 |