Issued Patents All Time
Showing 26–50 of 108 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10504798 | Gate cut in replacement metal gate process | Ruilong Xie, Chanro Park, Andrew M. Greene, Siva Kanakasabapathy, John R. Sporre | 2019-12-10 |
| 10475791 | Transistor fins with different thickness gate dielectric | Hui Zang, Garo Derderian, Chun Yu Wong, Jiehui Shu, Shesh Mani Pandey | 2019-11-12 |
| 10418285 | Fin field-effect transistor (FinFET) and method of production thereof | Hui Zang, Chun Yu Wong | 2019-09-17 |
| 10388652 | Intergrated circuit structure including single diffusion break abutting end isolation region, and methods of forming same | Yongiun Shi, Lei Sun, Ruilong Xie, Lars Liebmann, Chanro Park +4 more | 2019-08-20 |
| 10388747 | Gate contact structure positioned above an active region with air gaps positioned adjacent the gate structure | Ruilong Xie, Christopher M. Prindle, Emilie Bourjot | 2019-08-20 |
| 10373873 | Gate cut in replacement metal gate process | Chanro Park, Ruilong Xie, Kangguo Cheng | 2019-08-06 |
| 10373875 | Contacts formed with self-aligned cuts | Ruilong Xie, Daniel Jaeger, Chanro Park, Haiting Wang, Hui Zang | 2019-08-06 |
| 10373877 | Methods of forming source/drain contact structures on integrated circuit products | Haiting Wang, Hong Yu, Hui Zang, Wei Zhao, Yue Zhong +3 more | 2019-08-06 |
| 10276391 | Self-aligned gate caps with an inverted profile | Hui Zang, Ruilong Xie | 2019-04-30 |
| 10236213 | Gate cut structure with liner spacer and related method | Shesh Mani Pandey, Jiehui Shu, Hui Zang | 2019-03-19 |
| 10199271 | Self-aligned metal wire on contact structure and method for forming same | Ruilong Xie, Guillaume Bouche, Lei Sun, Guoxiang Ning, Xunyuan Zhang | 2019-02-05 |
| 10177041 | Fin-type field effect transistors (FINFETS) with replacement metal gates and methods | Ruilong Xie, Chanro Park, Min Gyu Sung | 2019-01-08 |
| 10157796 | Forming of marking trenches in structure for multiple patterning lithography | Chanro Park, Ruilong Xie, Pei Liu | 2018-12-18 |
| 10109505 | Dual medium filter for ion and particle filtering during semiconductor processing | John H. Zhang, Adam Ticknor, Wei-Tsu Tseng | 2018-10-23 |
| 10090402 | Methods of forming field effect transistors (FETS) with gate cut isolation regions between replacement metal gates | Chanro Park, Chang Ho Maeng, Pei Liu, Junsic Hong, Ruilong Xie | 2018-10-02 |
| 10056469 | Gate cut integration and related device | Hui-feng Li | 2018-08-21 |
| 9966272 | Methods for nitride planarization using dielectric | Haifeng Sheng, Haigou Huang, Tai Fong Chao, Jiehui Shu, Jinping Liu +1 more | 2018-05-08 |
| 9676075 | Methods and structures for achieving target resistance post CMP using in-situ resistance measurements | Elliott Peter Rill | 2017-06-13 |
| 9607864 | Dual medium filter for ion and particle filtering during semiconductor processing | John H. Zhang, Wei-Tsu Tseng, Adam Ticknor | 2017-03-28 |
| 9058976 | Cleaning composition and process for cleaning semiconductor devices and/or tooling during manufacturing thereof | Vishal Chhabra, John A. Fitzsimmons, James Hannah, Mahmoud Khojasteh, Jennifer V. Muncy | 2015-06-16 |
| 8858300 | Applying different pressures through sub-pad to fixed abrasive CMP pad | Glenn L. Cellier, Timothy M. McCormack, Rajasekhar Venigalla | 2014-10-14 |
| 8822994 | Method of repairing probe pads | John H. Zhang, Robin Van Den Nieuwenhuizen, Wei-Tsu Tseng | 2014-09-02 |
| 8792080 | Method and system to predict lithography focus error using simulated or measured topography | Brian C. Sapp, Choongyeun Cho, Lawrence A. Clevenger, Bernhard R. Liegl, Kevin S. Petrarca +1 more | 2014-07-29 |
| 8748252 | Replacement metal gate transistors using bi-layer hardmask | Effendi Leobandung, William J. Cote, Young-Hee Kim, Dae-Gyu Park, Theodorus E. Standaert +3 more | 2014-06-10 |
| 8324622 | Method of repairing probe pads | John H. Zhang, Robin Van Den Nieuwenhuizen, Wei-Tsu Tseng | 2012-12-04 |