Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10090402 | Methods of forming field effect transistors (FETS) with gate cut isolation regions between replacement metal gates | Chanro Park, Pei Liu, Junsic Hong, Laertis Economikos, Ruilong Xie | 2018-10-02 |
| 10056458 | Siloxane and organic-based MOL contact patterning | Andy Wei, Anthony Ozzello, Bharat Krishnan, Guillaume Bouche, Haifeng Sheng +9 more | 2018-08-21 |
| 9922972 | Embedded silicon carbide block patterning | Xiaofeng Qiu, Haigou Huang | 2018-03-20 |
| 9852900 | Oxidizing filler material lines to increase width of hard mask lines | Shivaji Peddeti | 2017-12-26 |
| 9252238 | Semiconductor structures with coplanar recessed gate layers and fabrication methods | Kristina Trevino, Yuan-Hung Liu, Gabriel Padron Wells, Xing Zhang, Hoong Shing Wong +4 more | 2016-02-02 |
| 9147680 | Integrated circuits having replacement metal gates with improved threshold voltage performance and methods for fabricating the same | Kristina Trevino, Yuan-Hung Lin, Gabriel Padron Wells, Taejoon Han, Hoong Shing Wong | 2015-09-29 |
| 8993445 | Selective removal of gate structure sidewall(s) to facilitate sidewall spacer protection | Dae-Han Choi, Dae Geun Yang, Wontae Hwang | 2015-03-31 |
| 8900940 | Reducing gate height variance during semiconductor device formation | Ashish Jha, Tae Hoon Kim, Tae Hoon Lee, Songkram Srivathanakul, Haiting Wang | 2014-12-02 |