Patent Leaderboard
USPTO Patent Rankings Data through Sept 30, 2025
KC

Kisik Choi

IBM: 76 patents #914 of 70,183Top 2%
Globalfoundries: 42 patents #54 of 4,424Top 2%
INIntermolecular: 1 patents #186 of 248Top 75%
SESematech: 1 patents #38 of 123Top 35%
SSStmicroelectronics Sa: 1 patents #938 of 1,676Top 60%
Watervliet, NY: #3 of 109 inventorsTop 3%
New York: #547 of 115,490 inventorsTop 1%
Overall (All Time): #14,429 of 4,157,543Top 1%
100 Patents All Time

Issued Patents All Time

Showing 1–25 of 100 patents

Patent #TitleCo-InventorsDate
12419079 Field effect transistor with backside source/drain Ruilong Xie, Lawrence A. Clevenger, Brent A. Anderson, Su Chen Fan, Shogo Mochizuki +1 more 2025-09-16
12412830 Semiconductor device with power via Ruilong Xie, Junli Wang, Julien Frougier, Reinaldo Vega, Lawrence A. Clevenger +2 more 2025-09-09
12394660 Buried power rail after replacement metal gate Devika Sarkar Grant, Sagarika Mukesh, Somnath Ghosh, Ruilong Xie 2025-08-19
12396227 Full wrap around backside contact Ruilong Xie, Junli Wang, Julien Frougier, Min Gyu Sung 2025-08-19
12300617 Self-aligned buried power rail cap for semiconductor devices Ruilong Xie, Huimei Zhou, Julien Frougier 2025-05-13
12295133 SRAM with backside cross-couple Ruilong Xie, Albert M. Chu, Carl Radens 2025-05-06
12266607 Bottom barrier free interconnects without voids Kenneth Chun Kuen Cheng, Koichi Motoyama, Cornelius Brown Peethala, Hosadurga Shobha, Joe Lee 2025-04-01
12268031 Backside power rails and power distribution network for density scaling Ruilong Xie, Somnath Ghosh, Sagarika Mukesh, Albert M. Chu, Albert M. Young +6 more 2025-04-01
12243913 Self-aligned backside contact integration for transistors Nikhil Jain, Sagarika Mukesh, Devika Sarkar Grant, Prabudhya Roy Chowdhury, Ruilong Xie 2025-03-04
12243819 Single-mask alternating line deposition Brent A. Anderson, Lawrence A. Clevenger, Christopher J. Penny, Nicholas Anthony Lanzillo, Robert R. Robison 2025-03-04
12148663 Tiered-profile contact for semiconductor Kangguo Cheng 2024-11-19
12087691 Semiconductor structures with backside gate contacts Ruilong Xie, Julien Frougier, Veeraraghavan S. Basker, Lawrence A. Clevenger, Nicolas Loubet +3 more 2024-09-10
11990412 Buried power rails located in a base layer including first, second, and third etch stop layers Ruilong Xie, Stuart A. Sieg, Somnath Ghosh, Rishikesh Krishnan, Alexander Reznicek 2024-05-21
11990410 Top via interconnect having a line with a reduced bottom dimension Brent A. Anderson, Lawrence A. Clevenger, Nicholas Anthony Lanzillo, Christopher J. Penny, Robert R. Robison 2024-05-21
11972977 Fabrication of rigid close-pitch interconnects Chanro Park, Kenneth Chun Kuen Cheng, Koichi Motoyama 2024-04-30
11961759 Interconnects having spacers for improved top via critical dimension and overlay tolerance Brent A. Anderson, Lawrence A. Clevenger, Nicholas Anthony Lanzillo, Christopher J. Penny, Robert R. Robison 2024-04-16
11915966 Backside power rail integration Ruilong Xie, Takeshi Nogami, Roy R. Yu, Balasubramanian Pranatharthiharan, Albert M. Young +1 more 2024-02-27
11894265 Top via with damascene line and via Lawrence A. Clevenger, Brent A. Anderson, Nicholas Anthony Lanzillo, Christopher J. Penny, Robert R. Robison 2024-02-06
11869808 Top via process with damascene metal Lawrence A. Clevenger, Brent A. Anderson, Nicholas Anthony Lanzillo, Christopher J. Penny, Robert R. Robison 2024-01-09
11842961 Advanced metal interconnects with a replacement metal Lawrence A. Clevenger, Nicholas Anthony Lanzillo, Brent A. Anderson 2023-12-12
11823998 Top via with next level line selective growth Brent A. Anderson, Lawrence A. Clevenger, Christopher J. Penny, Nicholas Anthony Lanzillo, Robert R. Robison 2023-11-21
11804436 Self-aligned buried power rail cap for semiconductor devices Ruilong Xie, Huimei Zhou, Julien Frougier 2023-10-31
11804406 Top via cut fill process for line extension reduction Christopher J. Penny, Brent A. Anderson, Lawrence A. Clevenger, Nicholas Anthony Lanzillo, Robert R. Robison 2023-10-31
11791258 Conductive lines with subtractive cuts Brent A. Anderson, Lawrence A. Clevenger, Nicholas Anthony Lanzillo, Christopher J. Penny, Robert R. Robison 2023-10-17
11670542 Stepped top via for via resistance reduction Brent A. Anderson, Lawrence A. Clevenger, Christopher J. Penny, Nicholas Anthony Lanzillo, Robert R. Robison 2023-06-06