Issued Patents All Time
Showing 226–250 of 437 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10290633 | CMOS compatible fuse or resistor using self-aligned contacts | Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert | 2019-05-14 |
| 10283636 | Vertical FET with strained channel | Shogo Mochizuki | 2019-05-07 |
| 10283586 | Capacitors | Veeraraghavan S. Basker, Kangguo Cheng, Christopher J. Penny, Theodorus E. Standaert | 2019-05-07 |
| 10283418 | Method of forming silicon germanium and silicon fins on oxide from bulk wafer | Hong He, James Kuss, Nicolas Loubet | 2019-05-07 |
| 10283406 | Fabrication of self-aligned gate contacts and source/drain contacts directly above gate electrodes and source/drains | Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert | 2019-05-07 |
| 10276558 | Electrostatic discharge protection using vertical fin CMOS technology | Brent A. Anderson, Huiming Bu, Terence B. Hook, Xuefeng Liu, Miaomiao Wang | 2019-04-30 |
| 10276658 | FinFET devices | Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert | 2019-04-30 |
| 10269644 | Fin pitch scaling for high voltage devices and low voltage devices on the same wafer | Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert | 2019-04-23 |
| 10256154 | Uniform shallow trench isolation | Kangguo Cheng, Peng Xu, Chen Zhang | 2019-04-09 |
| 10256145 | Semiconductor device and method of forming the semiconductor device | Lawrence A. Clevenger, Baozhen Li, Kirk D. Peterson, John E. Sheets, II, Chih-Chao Yang | 2019-04-09 |
| 10249753 | Gate cut on a vertical field effect transistor with a defined-width inorganic mask | Brent A. Anderson, Sivananda K. Kanakasabapathy, Jeffrey C. Shearer, Stuart A. Sieg, John R. Sporre | 2019-04-02 |
| 10249754 | Precise junction placement in vertical semiconductor devices using etch stop layers | Huiming Bu, Liying Jiang, Siyuranga O. Koswatta | 2019-04-02 |
| 10249537 | Method and structure for forming FinFET CMOS with dual doped STI regions | Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert | 2019-04-02 |
| 10243043 | Self-aligned air gap spacer for nanosheet CMOS devices | Shogo Mochizuki, Alexander Reznicek, Joshua M. Rubin | 2019-03-26 |
| 10243073 | Vertical channel field-effect transistor (FET) process compatible long channel transistors | Brent A. Anderson, Steven Bentley, Kwan-Yong Lim, Hiroaki Niimi | 2019-03-26 |
| 10236212 | Source and drain epitaxial semiconductor material integration for high voltage semiconductor devices | Balasubramanian Pranatharthiharan, Ruilong Xie | 2019-03-19 |
| 10236380 | Precise control of vertical transistor gate length | Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert | 2019-03-19 |
| 10236359 | Replacement metal gate structures | Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert | 2019-03-19 |
| 10236293 | FinFET CMOS with silicon fin N-channel FET and silicon germanium fin P-channel FET | Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert | 2019-03-19 |
| 10236289 | Approach to fabrication of an on-chip resistor with a field effect transistor | Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert | 2019-03-19 |
| 10236255 | Contact having self-aligned air gap spacers | Juntao Li, Chih-Chao Yang | 2019-03-19 |
| 10236219 | VFET metal gate patterning for vertical transport field effect transistor | Brent A. Anderson, Ruqiang Bao, Kangguo Cheng, Hemanth Jagannathan, Choonghyun Lee | 2019-03-19 |
| 10224249 | Merged gate for vertical transistors | Brent A. Anderson, Fee Li Lie, Edward J. Nowak | 2019-03-05 |
| 10224429 | Precise junction placement in vertical semiconductor devices using etch stop layers | Huiming Bu, Liying Jiang, Siyuranga O. Koswatta | 2019-03-05 |
| 10224247 | FinFET devices | Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert | 2019-03-05 |