JR

Jed H. Rankin

IBM: 198 patents #164 of 70,183Top 1%
Globalfoundries: 17 patents #201 of 4,424Top 5%
GU Globalfoundries U.S.: 1 patents #344 of 665Top 55%
📍 South Burlington, VT: #7 of 1,136 inventorsTop 1%
🗺 Vermont: #15 of 4,968 inventorsTop 1%
Overall (All Time): #2,825 of 4,157,543Top 1%
216
Patents All Time

Issued Patents All Time

Showing 176–200 of 216 patents

Patent #TitleCo-InventorsDate
6646305 Grounded body SOI SRAM cell Fariborz Assaderaghi, Andres Bryant, Peter E. Cottrell, Robert J. Gauthier, Jr., Randy W. Mann +1 more 2003-11-11
6624478 High mobility transistors in SOI and method for forming Brent A. Anderson, Xavier Baie, Randy W. Mann, Edward J. Nowak 2003-09-23
6624031 Test structure and methodology for semiconductor stress-induced defects and antifuse based on same test structure Wagdi W. Abadeer, Eric Adler, Jeffrey S. Brown, Robert J. Gauthier, Jr., Jonathan M. McKenna +2 more 2003-09-23
6610607 Method to define and tailor process limited lithographic features using a modified hard mask process Douglas S. Armbrust, Dale W. Martin, Sylvia Tousley 2003-08-26
6583469 Self-aligned dog-bone structure for FinFET applications and methods to fabricate the same David M. Fried, Timothy J. Hoague, Edward J. Nowak 2003-06-24
6573541 Charge coupled device with channel well William A. Klaasen, Gary Dale Pittman 2003-06-03
6563131 Method and structure of a dual/wrap-around gate field effect transistor James W. Adkisson, Paul D. Agnello, Arne Ballantine, Christopher S. Putnam 2003-05-13
6557163 Method of photolithographic critical dimension control by using reticle measurements in a control algorithm Craig E. Schneider, John S. Smyth, Andrew J. Watts 2003-04-29
6545333 Light controlled silicon on insulator device Mark B. Ketchen, Edward J. Nowak, Keith C. Stevens 2003-04-08
6534389 Dual level contacts and method for forming Thomas G. Ference, Kurt R. Kimmel, Alain Loiseau 2003-03-18
6525371 Self-aligned non-volatile random access memory cell and process to make the same Jeffrey B. Johnson, Chung H. Lam, Dana Lee, Dale W. Martin 2003-02-25
6504207 Method to create EEPROM memory structures integrated with high performance logic and NVRAM, and operating conditions for the same Bomy Chen, Jay G. Harrington, Kevin M. Houlihan, Dennis Hoyniak, Chung H. Lam +2 more 2003-01-07
6498372 Conductive coupling of electrical structures to a semiconductor device located under a buried oxide layer Jeffrey S. Brown, Robert J. Gauthier, Jr., William R. Tonti 2002-12-24
6498096 Borderless contact to diffusion with respect to gate conductor and methods for fabricating James Allan Bruce, Jonathan D. Chapple-Sokol, Charles W. Koburger, III, Michael Lercel, Randy W. Mann +3 more 2002-12-24
6496053 Corrosion insensitive fusible link using capacitance sensing for semiconductor devices Timothy H. Daubenspeck, Kurt R. Kimmel, William A. Klaasen, William T. Motsiff, Rosemary A. Previti-Kelly +1 more 2002-12-17
6483156 Double planar gated SOI MOSFET structure James W. Adkisson, John A. Bracchitta, John J. Ellis-Monaghan, Jerome B. Lasky, Effendi Leobandung +1 more 2002-11-19
6472258 Double gate trench transistor James W. Adkisson, Paul D. Agnello, Arne Ballantine, Rama Divakaruni, Erin C. Jones 2002-10-29
6469350 Active well schemes for SOI technology William F. Clark, Jr., Edward J. Nowak, Minh H. Tong 2002-10-22
6461797 Method and apparatus for selectively programming a semiconductor device Michael Lercel 2002-10-08
6458630 Antifuse for use with low k dielectric foam insulators Timothy H. Daubenspeck, William A. Klaasen, William T. Motsiff, Rosemary A. Previti-Kelly 2002-10-01
6440834 Method and structure for a semiconductor fuse Timothy H. Daubenspeck, William T. Motsiff 2002-08-27
6436744 Method and structure for creating high density buried contact for use with SOI processes for high performance logic Andres Bryant, Jerome B. Lasky, Edward J. Nowak, Minh H. Tong 2002-08-20
6426524 Fabricating a square spacer Chung H. Lam, Christa R. Willets, Arthur Paul Johnson 2002-07-30
6406962 Vertical trench-formed dual-gate FET device structure and method for creation Paul D. Agnello, Arne Ballantine, Ramachandra Divakaruni, Erin C. Jones, Edward J. Nowak 2002-06-18
6387596 Method of forming resist images by periodic pattern removal Daniel C. Cole, Edward W. Conrad, David V. Horak, Randy W. Mann, Paul W. Pastel +1 more 2002-05-14