Issued Patents All Time
Showing 1–25 of 36 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7144490 | Method for selective electroplating of semiconductor device I/O pads using a titanium-tungsten seed layer | Tien-Jen Cheng, David E. Eichstadt, Jonathan H. Griffith, Sarah H. Knickerbocker, Roger A. Quon +2 more | 2006-12-05 |
| 6835973 | Antifuse for use with low &kgr; dielectric foam insulators | Timothy H. Daubenspeck, William A. Klaasen, William T. Motsiff, Jed H. Rankin | 2004-12-28 |
| 6713838 | Inductive fuse for semiconductor device | Wilbur D. Pricer, William T. Motsiff | 2004-03-30 |
| 6495917 | Method and structure of column interconnect | John J. Ellis-Monaghan, Paul M. Feeney, Robert M. Geffken, Howard S. Landis, Bette L. Bergman Reuter +3 more | 2002-12-17 |
| 6496053 | Corrosion insensitive fusible link using capacitance sensing for semiconductor devices | Timothy H. Daubenspeck, Kurt R. Kimmel, William A. Klaasen, William T. Motsiff, W David Pricer +1 more | 2002-12-17 |
| 6458630 | Antifuse for use with low k dielectric foam insulators | Timothy H. Daubenspeck, William A. Klaasen, William T. Motsiff, Jed H. Rankin | 2002-10-01 |
| 6455434 | Prevention of slurry build-up within wafer topography during polishing | Chad R. Binkerd, Jose Luis Cruz, Timothy C. Krywanczyk, Brian D. Pfeifer, Patricia Schink +1 more | 2002-09-24 |
| 6452265 | Multi-chip module utilizing a nonconductive material surrounding the chips that has a similar coefficient of thermal expansion | Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes, David V. Horak, Edmund J. Sprogis | 2002-09-17 |
| 6388337 | Post-processing a completed semiconductor device | James G. Michael, Jeffrey S. Miller, Gary Dale Pittman | 2002-05-14 |
| 6335229 | Inductive fuse for semiconductor device | Wilbur D. Pricer, William T. Motsiff | 2002-01-01 |
| 6174824 | Post-processing a completed semiconductor device | James G. Michael, Jeffrey S. Miller, Gary Dale Pittman | 2001-01-16 |
| 5766808 | Process for forming multilayer lift-off structures | Harold G. Linde, Thomas J. Reen | 1998-06-16 |
| 5710460 | Structure for reducing microelectronic short circuits using spin-on glass as part of the interlayer dielectric | Robert K. Leidy, Jeffrey S. Miller, Jon Patrick | 1998-01-20 |
| 5641838 | Thermostable coating materials | Harold G. Linde, Thomas J. Reen | 1997-06-24 |
| 5569731 | N,N' disubstituted perylene diamide | Harold G. Linde, Thomas J. Reen | 1996-10-29 |
| 5552638 | Metallized vias in polyimide | Loretta J. O'Connor, Thomas J. Reen | 1996-09-03 |
| 5503961 | Process for forming multilayer lift-off structures | Harold G. Linde, Thomas J. Reen | 1996-04-02 |
| 5466636 | Method of forming borderless contacts using a removable mandrel | John Cronin, Carter W. Kaanta, Donald M. Kenney, Michael L. Kerbaugh, Howard S. Landis +3 more | 1995-11-14 |
| 5451655 | Process for making thermostable coating materials | Harold G. Linde, Thomas J. Reen | 1995-09-19 |
| 5397741 | Process for metallized vias in polyimide | Loretta J. O'Connor, Thomas J. Reen | 1995-03-14 |
| 5326430 | Cooling microfan arrangements and process | John Cronin, James G. Ryan, Timothy D. Sullivan | 1994-07-05 |
| 5296775 | Cooling microfan arrangements and process | John Cronin, James G. Ryan, Timothy D. Sullivan | 1994-03-22 |
| 5286572 | Planarizing ladder-type silsequioxane polymer insulation layer | Donna J. Clodgo, Ronald R. Uttecht, Erick G. Walton | 1994-02-15 |
| 5229257 | Process for forming multi-level coplanar conductor/insulator films employing photosensitive polymide polymer compositions | John Cronin, Carter W. Kaanta, Pei-Ing Lee, James G. Ryan, Jung Hyuk YOON | 1993-07-20 |
| 5219788 | Bilayer metallization cap for photolithography | John R. Abernathey, Timothy H. Daubenspeck, Stephen E. Luce, Denis J. Poley, Gary P. Viens +1 more | 1993-06-15 |