Issued Patents All Time
Showing 26–50 of 74 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6924185 | Fuse structure and method to form the same | David K. Anderson, Tien-Jen Cheng, Timothy J. Dalton, Christopher V. Jahnes, Andrew Lu +3 more | 2005-08-02 |
| 6856025 | Chip and wafer integration process using vertical connections | H. Bernhard Pogge, Roy Yu, Chandrika Prasad | 2005-02-15 |
| 6831363 | Structure and method for reducing thermo-mechanical stress in stacked vias | Timothy J. Dalton, Sanjit Das, Brett H. Engel, Brian Herbst, Habib Hichri +8 more | 2004-12-14 |
| 6700161 | Variable resistor structure and method for forming and programming a variable resistor for electronic circuits | Louis L. Hsu, Carl Radens | 2004-03-02 |
| 6697037 | TFT LCD active data line repair | Paul M. Alt, Pedro A. Chalco, Bruce K. Furman, Raymond R. Horton, Benal Lee Owens, Jr. +2 more | 2004-02-24 |
| 6624499 | System for programming fuse structure by electromigration of silicide enhanced by creating temperature gradient | Chandrasekharan Kothandaraman, S. Sundar Kumar Iyer, Subramanian S. Iyer | 2003-09-23 |
| 6599778 | Chip and wafer integration process using vertical connections | H. Bernhard Pogge, Roy Yu, Chandrika Prasad | 2003-07-29 |
| 6566238 | Metal wire fuse structure with cavity | Axel Brintzinger, Edward W. Kiewra, Carl Radens | 2003-05-20 |
| 6495901 | Multi-level fuse structure | Axel Brintzinger, David Lachtrupp, Kenneth C. Arndt | 2002-12-17 |
| 6486526 | Crack stop between neighboring fuses for protection from fuse blow damage | Edward W. Kiewra, Carl Radens, Axel Brintzinger | 2002-11-26 |
| 6436585 | Method of using optical proximity effects to create electrically blown fuses with sub-critical dimension neck downs | Axel Brintzinger, Fred L. Einspruch, Henning Haffner, Alan C. Thomas | 2002-08-20 |
| 6420216 | Fuse processing using dielectric planarization pillars | Larry Clevenger, Louis L. Hsu, Jeremy K. Stephens, Michael Wise | 2002-07-16 |
| 6380003 | Damascene anti-fuse with slot via | Christopher V. Jahnes, Carl Radens | 2002-04-30 |
| 6323535 | Electrical fuses employing reverse biasing to enhance programming | Sundar Iyer, Peter Smeys, Subramanian S. Iyer, Axel Brintzinger | 2001-11-27 |
| 6301903 | Apparatus for activating fusible links on a circuit substrate | Daniel C. Edelstein | 2001-10-16 |
| 6295128 | Optical alignment of superpositioned objects | Raymond R. Horton, Michael J. Palmer | 2001-09-25 |
| 6288436 | Mixed fuse technologies | Kenneth C. Arndt, Toshiaki Kirihata, David Lachtrupp, Axel Brintzinger, Gabriel Daniel | 2001-09-11 |
| 6274440 | Manufacturing of cavity fuses on gate conductor level | Kenneth C. Arndt, Axel Brintzinger, Richard A. Conti, Donna R. Cote, Ravikumar Ramachandran +2 more | 2001-08-14 |
| 6268638 | Metal wire fuse structure with cavity | Axel Brintzinger, Edward W. Kiewra, Carl Radens | 2001-07-31 |
| 6266272 | Partially non-volatile dynamic random access memory formed by a plurality of single transistor cells used as DRAM cells and EPROM cells | Toshiaki Kirihata, Daniel W. Storaska, William R. Tonti, Claude L. Bertin, Nick van Heel | 2001-07-24 |
| 6242789 | Vertical fuse and method of fabrication | Stefan Weber, Axel Brintzinger, Roy Iggulden, Mark Hoinkis, Robert Willem Van Den Berg | 2001-06-05 |
| 6218279 | Vertical fuse and method of fabrication | Stefan Weber, Axel Brintzinger, Roy Iggulden, Mark Hoinkis, Robert Willem Van Den Berg | 2001-04-17 |
| 6208008 | Integrated circuits having reduced stress in metallization | Kenneth C. Arndt, Richard A. Conti, David M. Dobuzinsky, Laertis Economikos, Jeffrey P. Gambino +1 more | 2001-03-27 |
| 6141267 | Defect management engine for semiconductor memories and memory systems | Toshiaki Kirihata, Louis L. Hsu | 2000-10-31 |
| 6127721 | Soft passivation layer in semiconductor fabrication | Bettina Dinkel | 2000-10-03 |