Issued Patents All Time
Showing 76–100 of 110 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9257330 | Ultra-thin structure to protect copper and method of preparation | Amit Chatterjee, Geetika Bajaj, Pramit Manna, He Ren, Tapash Chakraborty +3 more | 2016-02-09 |
| 9184093 | Integrated cluster to enable next generation interconnect | Abhijit Basu Mallick, Kiran V. Thadani, Zhenjiang Cui | 2015-11-10 |
| 8951911 | Process for damascene structure with reduced low-k damage | Zhenjiang Cui | 2015-02-10 |
| 8563095 | Silicon nitride passivation layer for covering high aspect ratio features | Nagarajan Rajagopalan, Xinhai Han, Ryan Yamase, Ji Ae Park, Shamik Patel +5 more | 2013-10-22 |
| 8329575 | Fabrication of through-silicon vias on silicon wafers | Nagarajan Rajagopalan, Ji Ae Park, Ryan Yamase, Shamik Patel, Thomas Nowak +5 more | 2012-12-11 |
| 8283237 | Fabrication of through-silicon vias on silicon wafers | Nagarajan Rajagopalan, Ji Ae Park, Ryan Yamase, Shamik Patel, Thomas Nowak +5 more | 2012-10-09 |
| 8058183 | Restoring low dielectric constant film properties | Zhenjiang Cui, May Yu, Alexandros T. Demos | 2011-11-15 |
| 7928003 | Air gap interconnects using carbon-based films | — | 2011-04-19 |
| 7910476 | Adhesion and minimizing oxidation on electroless CO alloy films for integration with low K inter-metal dielectric and etch stop | Hongbin Fang, Timothy Weidman, Fang Mei, Yaxin Wang, Arulkumar Shanmugasundram +1 more | 2011-03-22 |
| 7879683 | Methods and apparatus of creating airgap in dielectric layers for the reduction of RC delay | Amir Al-Bayati, Alexandros T. Demos, Kang Sub Yim, Zhenjiang Cui, Mihaela Balseanu +2 more | 2011-02-01 |
| 7811924 | Air gap formation and integration using a patterning cap | Zhenjiang Cui, Christopher Dennis Bencher, Kenneth P. MacWilliams | 2010-10-12 |
| 7618889 | Dual damascene fabrication with low k materials | — | 2009-11-17 |
| 7572734 | Etch depth control for dual damascene fabrication process | Suketu Arun Parikh, Michael D. Armacost | 2009-08-11 |
| 7244672 | Selective etching of organosilicate films over silicon oxide stop etch layers | Huong Nguyen, Michael Barnes, Li-Qun Xia | 2007-07-17 |
| 7226853 | Method of forming a dual damascene structure utilizing a three layer hard mask structure | Nikolaos Bekiaris, Timothy Weidman, Michael D. Armacost | 2007-06-05 |
| 7205228 | Selective metal encapsulation schemes | Deenesh Padhi, Srinivas Gandikota, Suketu Arun Parikh, Girish Dixit | 2007-04-17 |
| 7183201 | Selective etching of organosilicate films over silicon oxide stop etch layers | Huong Nguyen, Michael Barnes, Li-Qun Xia | 2007-02-27 |
| 7115534 | Dielectric materials to prevent photoresist poisoning | Son V. Nguyen, Michael D. Armacost, Girish Dixit, Ellie Yieh | 2006-10-03 |
| 7034409 | Method of eliminating photoresist poisoning in damascene applications | Ping Xu, Li-Qun Xia, Larry Dworkin | 2006-04-25 |
| 6825562 | Damascene structure fabricated using a layer of silicon-based photoresist material | Tim Weidman, Dian Sugiarto, Allen Zhao | 2004-11-30 |
| 6680164 | Solvent free photoresist strip and residue removal processing for post etching of low-k films | Huong Nguyen, Mark Kawaguchi, Li-Qun Xia, Ellie Yieh | 2004-01-20 |
| 6656837 | Method of eliminating photoresist poisoning in damascene applications | Ping Xu, Li-Qun Xia, Larry Dworkin | 2003-12-02 |
| 6548396 | Method of producing an interconnect structure for an integrated circuit | Samuel Broydo | 2003-04-15 |
| 6514671 | Interconnect line formed by dual damascene using dielectric layers having dissimilar etching characteristics | Suketu Arun Parikh, Samuel Broydo, H. Peter W. Hey | 2003-02-04 |
| 6514857 | Damascene structure fabricated using a layer of silicon-based photoresist material | Tim Weidman, Dian Sugiarto, Allen Zhao | 2003-02-04 |