Patent Leaderboard
USPTO Patent Rankings Data through Sept 30, 2025
MN

Mehul Naik

Applied Materials: 108 patents #33 of 7,310Top 1%
MIMicromaterials: 2 patents #18 of 34Top 55%
San Jose, CA: #205 of 32,062 inventorsTop 1%
California: #1,844 of 386,348 inventorsTop 1%
Overall (All Time): #11,900 of 4,157,543Top 1%
110 Patents All Time

Issued Patents All Time

Showing 101–110 of 110 patents

Patent #TitleCo-InventorsDate
6458684 Single step process for blanket-selective CVD aluminum deposition Ted Guo, Liang-Yuh Chen, Roderick C. Mosely 2002-10-01
6391771 Integrated circuit interconnect lines having sidewall layers Suketu Arun Parikh 2002-05-21
6245662 Method of producing an interconnect structure for an integrated circuit Samuel Broydo 2001-06-12
6204168 Damascene structure fabricated using a layer of silicon-based photoresist material Tim Weidman, Dian Sugiarto, Allen Zhao 2001-03-20
6168726 Etching an oxidized organo-silane film Zongyu LI, Jian Ding 2001-01-02
6169030 Metallization process and method Ted Guo, Liang-Yuh Chen, Roderick C. Mosely, Israel Beinglass 2001-01-02
6139905 Integrated CVD/PVD Al planarization using ultra-thin nucleation layers Liang-Yuh Chen, Ted Guo, Roderick C. Mosely 2000-10-31
6077781 Single step process for blanket-selective CVD aluminum deposition Ted Guo, Liang-Yuh Chen, Roderick C. Mosely 2000-06-20
6054380 Method and apparatus for integrating low dielectric constant materials into a multilevel metallization and interconnect structure 2000-04-25
6017144 Method and apparatus for depositing highly oriented and reflective crystalline layers using a low temperature seeding layer Ted Guo, Liang Chen, Roderick C. Mosely, Israel Beinglass 2000-01-25