Issued Patents All Time
Showing 25 most recent of 48 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12416080 | Atomic layer self aligned substrate processing and integrated toolset | — | 2025-09-16 |
| 12374584 | Multi color stack for self aligned dual pattern formation for multi purpose device structures | Martin Jay Seamons, Jingmei Liang, Shuchi Sunil Ojha, Tom Choi, Nitin K. Ingle +1 more | 2025-07-29 |
| 12334394 | Methods and apparatus for selective etch stop capping and selective via open for fully landed via on underlying metal | Mihaela Balseanu, Bhaskar Jyoti Bhuyan, Ning Li, Mark Saly, Aaron Dangerfield +2 more | 2025-06-17 |
| 12315735 | Methods for removing etch stop layers | Andrew W. Yeoh, Tom Choi, Joung Joo Lee, Nitin K. Ingle | 2025-05-27 |
| 12183631 | Methods for copper doped hybrid metallization for line and via | Alexander Jansen, Joung Joo Lee, Lequn Liu | 2024-12-31 |
| 12148660 | Low resistance and high reliability metallization module | Roey Shaviv, Feng Chen, Lu Chen | 2024-11-19 |
| 12142487 | Methods of modifying portions of layer stacks | — | 2024-11-12 |
| 11948885 | Methods and apparatus for forming dual metal interconnects | Rong Tao, Roey Shaviv, Joung Joo Lee, Seshadri Ganguli, Shirish A. PETHE +3 more | 2024-04-02 |
| 11749561 | Self-alignment etching of interconnect layers | — | 2023-09-05 |
| 11682668 | Stacked transistor device | Sanjay Natarajan | 2023-06-20 |
| 11658041 | Methods of modifying portions of layer stacks | — | 2023-05-23 |
| 11557509 | Self-alignment etching of interconnect layers | — | 2023-01-17 |
| 11495461 | Film stack for lithography applications | Tejinder Singh, Daniel Lee Diehl, Michael Stolfi, Jothilingam Ramalingam, Yong Cao +3 more | 2022-11-08 |
| 11309404 | Integrated CMOS source drain formation with advanced control | Benjamin Colombeau, Tushar Mandrekar, Patricia M. Liu, Matthias Bauer, Dimitri Kioussis +2 more | 2022-04-19 |
| 11270914 | Method of forming self-aligned via | Mihaela Balseanu | 2022-03-08 |
| 11177254 | Stacked transistor device | Sanjay Natarajan | 2021-11-16 |
| 11131022 | Atomic layer self aligned substrate processing and integrated toolset | — | 2021-09-28 |
| 11075165 | Methods and apparatus for forming dual metal interconnects | Rong Tao, Roey Shaviv, Joung Joo Lee, Seshadri Ganguli, Shirish A. PETHE +3 more | 2021-07-27 |
| 11054815 | Apparatus for cost-effective conversion of unsupervised fault detection (FD) system to supervised FD system | Bradley D. Schulze, Jimmy Iskandar, Jigar Bhadriklal Patel | 2021-07-06 |
| 11049770 | Methods and apparatus for fabrication of self aligning interconnect structure | — | 2021-06-29 |
| 10923396 | Method of forming self-aligned via | Mihaela Balseanu | 2021-02-16 |
| 10892198 | Systems and methods for improved performance in semiconductor processing | Chirantha Rodrigo, Tsz Keung Cheung, Satya Gowthami Achanta, Jingchun Zhang, Saravjeet Singh +1 more | 2021-01-12 |
| 10867858 | Simultaneous metal patterning for 3D interconnects | — | 2020-12-15 |
| 10695804 | Equipment cleaning apparatus and method | Roman Mostovoy, Todd Egan | 2020-06-30 |
| 10629484 | Method of forming self-aligned via | Mihaela Balseanu | 2020-04-21 |