Issued Patents All Time
Showing 1–25 of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12131973 | Semiconductor device and method forming the same | Guang-Yuan JIANG, Cheng-Yi Hsieh, Wei-Chan Chang, Chang-Sheng Lin | 2024-10-29 |
| 11935878 | Package structure and method for manufacturing the same | Guang-Yuan JIANG, Cheng-Yi Hsieh, Wei-Chan Chang, Chang-Sheng Lin | 2024-03-19 |
| 11810804 | Method of forming dice and structure of die | Wei-Chan Chang, Chang-Sheng Lin, Chun-Yi Wu | 2023-11-07 |
| 11588036 | High-efficiency packaged chip structure and electronic device including the same | Cheng-Yi Hsieh, Wei-Chan Chang, Chang-Sheng Lin, Chun-Yi Wu | 2023-02-21 |
| 11309201 | Method of forming dice and structure of die | Wei-Chan Chang, Chang-Sheng Lin, Chun-Yi Wu | 2022-04-19 |
| 10797007 | Semiconductor structure and manufacturing method thereof | Hsiao-Wen Lee | 2020-10-06 |
| 10157839 | Interconnect structure and manufacturing method thereof | Chia-Jen Cheng | 2018-12-18 |
| 9870975 | Chip package with thermal dissipation structure and method for forming the same | Chin-Hua Wang, Po-Yao Lin, Shu-Shen Yeh, Kuang-Chun Lee, Shin-Puu Jeng +2 more | 2018-01-16 |
| 9515038 | Electrical connection for chip scale packaging | Ming-Chih Yew, Fu-Jen Li, Po-Yao Lin, Chia-Jen Cheng | 2016-12-06 |
| 9087882 | Electrical connection for chip scale packaging | Ming-Chih Yew, Fu-Jen Li, Po-Yao Lin, Chia-Jen Cheng | 2015-07-21 |
| 8669641 | Diffusion region routing for narrow scribe-line devices | Ming-Chang Hsieh, Hung-Lin Chen, Chin Kun Lan, Dong-Lung Lee | 2014-03-11 |
| 8624392 | Electrical connection for chip scale packaging | Ming-Chih Yew, Fu-Jen Li, Po-Yao Lin, Chia-Jen Cheng | 2014-01-07 |
| 8048778 | Methods of dicing a semiconductor structure | Chin-Yu Ku, Chun-Ying Lin, Young-Chang Lien, Sheng-Hsiang Chiu, Ta-Jen Yu | 2011-11-01 |
| 7968431 | Diffusion region routing for narrow scribe-line devices | Ming-Chang Hsieh, Hung-Lin Chen, Chin Kun Lan, Dong-Lung Lee | 2011-06-28 |
| 7863742 | Back end integrated WLCSP structure without aluminum pads | Tjandra Winata Karta, Daniel Yang, Shih-Ming Chen, Chia-Jen Cheng | 2011-01-04 |
| 7781140 | Method of fine pitch bump stripping | Chih-Min Tseng, Wen-Hsiang Tseng, Chia-Jen Cheng, Yu-Lung Feng, Tung-Wen Hsieh | 2010-08-24 |
| 7714414 | Method and apparatus for polymer dielectric surface recovery by ion implantation | Ken-Shen Chou, Shun-Liang Hsu | 2010-05-11 |
| 7456090 | Method to reduce UBM undercut | Blenny Chang, Gil Huang, Sung-Cheng Chiu | 2008-11-25 |
| 7378724 | Cavity structure for semiconductor structures | Gil Huang, Chien-Tung Yu, Owen Chen | 2008-05-27 |
| 7364998 | Method for forming high reliability bump structure | Sung-Cheng Chiu, Hao-Yi Tsai, Shih-Ming Chen, Shang-Yun Hou | 2008-04-29 |
| 6941957 | Method and apparatus for pretreating a substrate prior to electroplating | Kuo-Feng Chen, Charles Tseng, Ta-Yang Lin | 2005-09-13 |
| 6696356 | Method of making a bump on a substrate without ribbon residue | Li-Hsin Tseng, Ta-Yang Lin, Fang-Chung Liu, Kai-Ming Ching, Tung-Heng Shie | 2004-02-24 |
| 6624060 | Method and apparatus for pretreating a substrate prior to electroplating | Kuo-Feng Chen, Charles Tseng, Ta-Yang Lin | 2003-09-23 |
| 6593220 | Elastomer plating mask sealed wafer level package method | Ken-Shen Chou, Hsiu-Chieh Cheng, Shun-Liang Hsu | 2003-07-15 |
| 6541366 | Method for improving a solder bump adhesion bond to a UBM contact layer | Shih-Ming Chin, Fang Liu, Chia-Jen Cheng | 2003-04-01 |