Issued Patents All Time
Showing 1–25 of 123 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12424511 | High efficiency heat dissipation using discrete thermal interface material films | Yu-Chen Lee, Chia-Kuei Hsu, Po-Yao Lin, Shin-Puu Jeng | 2025-09-23 |
| 12417970 | Method for forming chip package structure | Chin-Hua Wang, Chia-Kuei Hsu, Po-Chen Lai, Po-Yao Lin, Shin-Puu Jeng | 2025-09-16 |
| 12412827 | Semiconductor die package with conductive line crack prevention design | Ya Huei Lee, Kuo-Ching Hsu, Shyue-Ter Leu, Po-Yao Lin, Shin-Puu Jeng | 2025-09-09 |
| 12406897 | Package structure with buffer layer embedded in lid layer | Yu-Sheng Lin, Ming-Chih Yew, Po-Yao Lin, Shin-Puu Jeng | 2025-09-02 |
| 12406936 | Semiconductor package with substrate recess and methods for forming the same | Ming-Chih Yew, Yu-Sheng Lin, Po-Yao Lin, Shin-Puu Jeng | 2025-09-02 |
| 12406898 | Chip package structure with lid | Che-Chia Yang, Yu-Sheng Lin, Chin-Hua Wang, Po-Yao Lin, Shin-Puu Jeng | 2025-09-02 |
| 12394752 | Multi-chip device and method of formation | Chin-Hua Wang, Po-Chen Lai, Tsung-Yen Lee, Po-Yao Lin, Shin-Puu Jeng | 2025-08-19 |
| 12394698 | Underfill cushion films for packaging substrates and methods of forming the same | Chia-Kuei Hsu, Ming-Chih Yew, Po-Yao Lin, Shin-Puu Jeng | 2025-08-19 |
| 12387991 | Manufacturing method of semiconductor package | Che-Chia Yang, Chin-Hua Wang, Yu-Sheng Lin, Po-Yao Lin, Shin-Puu Jeng | 2025-08-12 |
| 12374636 | Semiconductor device package with stress reduction design | Chin-Hua Wang, Po-Chen Lai, Po-Yao Lin, Shin-Puu Jeng | 2025-07-29 |
| 12374561 | Chip package structure with ring dam | Yu-Sheng Lin, Po-Yao Lin, Chin-Hua Wang, Shin-Puu Jeng | 2025-07-29 |
| 12368114 | Semiconductor device package having warpage control and method of forming the same | Che-Chia Yang, Chia-Kuei Hsu, Ming-Chih Yew, Po-Yao Lin, Shin-Puu Jeng | 2025-07-22 |
| 12368080 | Chip package structure with ring structure | Po-Yao Lin, Shin-Puu Jeng, Po-Chen Lai, Kuang-Chun Lee, Che-Chia Yang +2 more | 2025-07-22 |
| 12368127 | Semiconductor chip package having underfill material surrounding a fan-out package and contacting a stress buffer structure sidewall | Po-Chen Lai, Ming-Chih Yew, Po-Yao Lin, Shin-Puu Jeng | 2025-07-22 |
| 12362268 | Package assembly including package substrate with elongated solder resist opening and methods for forming the same | Chin-Hua Wang, Yu-Sheng Lin, Po-Yao Lin, Shin-Puu Zeng | 2025-07-15 |
| 12362197 | Semiconductor die package with ring structure | Yu-Sheng Lin, Chin-Hua Wang, Po-Yao Lin, Shin-Puu Jeng | 2025-07-15 |
| 12354928 | Semiconductor device and manufacturing method thereof | Po-Yao Lin, Hui Yu, Shyue-Ter Leu, Shin-Puu Jeng | 2025-07-08 |
| 12347793 | Semiconductor package | Chin-Hua Wang, Yu-Sheng Lin, Po-Yao Lin, Shin-Puu Jeng | 2025-07-01 |
| 12347764 | Organic interposer including intra-die structural reinforcement structures and methods of forming the same | Li-Ling Liao, Ming-Chih Yew, Chia-Kuei Hsu, Po-Yao Lin, Shin-Puu Jeng | 2025-07-01 |
| 12327772 | Semiconductor package including stress-reduction structures and methods of forming the same | Yu-Sheng Lin, Ming-Chih Yew, Po-Yao Lin, Shin-Puu Jeng, Chin-Hua Wang | 2025-06-10 |
| 12322704 | Package structure with underfill | Yu-Sheng Lin, Shin-Puu Jeng, Po-Yao Lin, Chin-Hua Wang, Che-Chia Yang | 2025-06-03 |
| 12322703 | Eccentric via structures for stress reduction | Che-Chia Yang, Chia-Kuei Hsu, Po-Yao Lin, Shin-Puu Jeng, Chia-Hsiang Lin | 2025-06-03 |
| 12322666 | Package assembly lid and methods for forming the same | Yu-Sheng Lin, Chien-Shen Chen, Po-Yao Lin, Shin-Puu Jeng, Ming-Chih Yew +3 more | 2025-06-03 |
| 12315768 | Package assembly including lid with additional stress mitigating feet and methods of making the same | Yu-Sheng Lin, Chin-Hua Wang, Po-Yao Lin, Shin-Puu Jeng, Chien-Hung Chen +3 more | 2025-05-27 |
| 12308346 | Semiconductor die with tapered sidewall in package | Chin-Hua Wang, Shin-Puu Jeng, Po-Yao Lin, Po-Chen Lai, Ming-Chih Yew +1 more | 2025-05-20 |