PL

Po-Chen Lai

TSMC: 46 patents #715 of 12,232Top 6%
FC Far Eastern New Century: 2 patents #25 of 103Top 25%
📍 Dashulong, TW: #53 of 596 inventorsTop 9%
Overall (All Time): #57,415 of 4,157,543Top 2%
48
Patents All Time

Issued Patents All Time

Showing 1–25 of 48 patents

Patent #TitleCo-InventorsDate
12417970 Method for forming chip package structure Chin-Hua Wang, Chia-Kuei Hsu, Shu-Shen Yeh, Po-Yao Lin, Shin-Puu Jeng 2025-09-16
12394752 Multi-chip device and method of formation Chin-Hua Wang, Shu-Shen Yeh, Tsung-Yen Lee, Po-Yao Lin, Shin-Puu Jeng 2025-08-19
12374636 Semiconductor device package with stress reduction design Shu-Shen Yeh, Chin-Hua Wang, Po-Yao Lin, Shin-Puu Jeng 2025-07-29
12368080 Chip package structure with ring structure Shu-Shen Yeh, Po-Yao Lin, Shin-Puu Jeng, Kuang-Chun Lee, Che-Chia Yang +2 more 2025-07-22
12368127 Semiconductor chip package having underfill material surrounding a fan-out package and contacting a stress buffer structure sidewall Ming-Chih Yew, Shu-Shen Yeh, Po-Yao Lin, Shin-Puu Jeng 2025-07-22
12362256 Method for forming semiconductor package structure Ming-Chih Yew, Po-Yao Lin, Chin-Hua Wang, Shin-Puu Jeng 2025-07-15
12341091 Semiconductor packages having conductive patterns of redistribution structure having ellipse-like shape Chia-Kuei Hsu, Ming-Chih Yew, Chin-Hua Wang, Po-Yao Lin, Shin-Puu Jeng 2025-06-24
12334451 Semiconductor package including package substrate with dummy via and method of forming the same Chin-Hua Wang, Chun-Wei Chen, Shin-Puu Jeng 2025-06-17
12322666 Package assembly lid and methods for forming the same Yu-Sheng Lin, Shu-Shen Yeh, Chien-Shen Chen, Po-Yao Lin, Shin-Puu Jeng +3 more 2025-06-03
12315768 Package assembly including lid with additional stress mitigating feet and methods of making the same Yu-Sheng Lin, Shu-Shen Yeh, Chin-Hua Wang, Po-Yao Lin, Shin-Puu Jeng +3 more 2025-05-27
12308346 Semiconductor die with tapered sidewall in package Chin-Hua Wang, Shin-Puu Jeng, Po-Yao Lin, Shu-Shen Yeh, Ming-Chih Yew +1 more 2025-05-20
12266635 Semiconductor device package having dummy dies Che-Chia Yang, Shu-Shen Yeh, Ming-Chih Yew, Po-Yao Lin, Shin-Puu Jeng 2025-04-01
12261102 Semiconductor package and method of forming the same Li-Ling Liao, Ming-Chih Yew, Che-Chia Yang, Po-Yao Lin, Shin-Puu Jeng 2025-03-25
12255156 Semiconductor package with riveting structure between two rings and method for forming the same Chien-Hung Chen, Shu-Shen Yeh, Po-Yao Lin, Shin-Puu Jeng 2025-03-18
12255078 Semiconductor devices and methods of manufacturing Ming-Chih Yew, Po-Yao Lin, Chien-Sheng Chen, Shin-Puu Jeng 2025-03-18
12237276 Package structure Chin-Hua Wang, Ming-Chih Yew, Che-Chia Yang, Shu-Shen Yeh, Po-Yao Lin +1 more 2025-02-25
12176301 Package structure and method for forming the same Chin-Hua Wang, Ming-Chih Yew, Li-Ling Liao, Tsung-Yen Lee, Po-Yao Lin +1 more 2024-12-24
12125822 Method of manufacturing a semiconductor device package having dummy dies Che-Chia Yang, Shu-Shen Yeh, Ming-Chih Yew, Po-Yao Lin, Shin-Puu Jeng 2024-10-22
12113033 Chip package structure Chin-Hua Wang, Ming-Chih Yew, Chia-Kuei Hsu, Li-Ling Liao, Po-Yao Lin +1 more 2024-10-08
12087705 Package structure with warpage-control element Yu-Sheng Lin, Chien-Hung Chen, Po-Yao Lin, Shin-Puu Jeng 2024-09-10
12057363 Chip package structure with multiple gap-filling layers and fabricating method thereof Ming-Chih Yew, Po-Yao Lin, Chin-Hua Wang, Shin-Puu Jeng 2024-08-06
12040285 Structure and formation method of chip package with reinforcing structures Ming-Chih Yew, Po-Yao Lin, Yu-Sheng Lin, Shin-Puu Jeng 2024-07-16
12035475 Semiconductor package with stress reduction design and method for forming the same Chia-Kuei Hsu, Ming-Chih Yew, Po-Yao Lin, Shin-Puu Jeng 2024-07-09
12014969 Package structure and method for forming the same Ming-Chih Yew, Li-Ling Liao, Chin-Hua Wang, Po-Yao Lin, Shin-Puu Jeng 2024-06-18
11990418 Chip package structure with buffer structure and method for forming the same Chin-Hua Wang, Ping-Tai CHEN, Che-Chia Yang, Yu-Sheng Lin, Po-Yao Lin +1 more 2024-05-21