Issued Patents All Time
Showing 51–75 of 114 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7279720 | Large bumps for optical flip chips | Ming Fang, Daoqiang Lu | 2007-10-09 |
| 7279231 | Electroless plating structure | Ramanan V. Chebiam | 2007-10-09 |
| 7279423 | Forming a copper diffusion barrier | Steven W. Johnston, Michael L. McSwiney, Peter K. Moon | 2007-10-09 |
| 7276801 | Designs and methods for conductive bumps | Sridhar Balakrishnan, Mark Bohr | 2007-10-02 |
| 7262504 | Multiple stage electroless deposition of a metal layer | Chin-Chang Cheng | 2007-08-28 |
| 7250366 | Carbon nanotubes with controlled diameter, length, and metallic contacts | — | 2007-07-31 |
| 7229922 | Method for making a semiconductor device having increased conductive material reliability | Ramanan V. Chebiam | 2007-06-12 |
| 7223694 | Method for improving selectivity of electroless metal deposition | Chin-Chang Cheng, Peter K. Moon | 2007-05-29 |
| 7223695 | Methods to deposit metal alloy barrier layers | Ting Zhong, Fay Hua | 2007-05-29 |
| 7208327 | Metal oxide sensors and method of forming | Florian Gstrein | 2007-04-24 |
| 7192856 | Forming dual metal complementary metal oxide semiconductor integrated circuits | Mark L. Doczy, Lawrence Wong, Justin K. Brask, Jack T. Kavalieros, Suman Datta +2 more | 2007-03-20 |
| 7157380 | Damascene process for fabricating interconnect layers in an integrated circuit | Makarem A. Hussein, Mark Bohr | 2007-01-02 |
| 7149085 | Electroosmotic pump apparatus that generates low amount of hydrogen gas | Ramanan V. Chebiam | 2006-12-12 |
| 7135775 | Enhancement of an interconnect | Stephen Chambers, Andrew Ott, Christine Hau-Riege | 2006-11-14 |
| 7122461 | Method to assemble structures from nano-materials | — | 2006-10-17 |
| 7118941 | Method of fabricating a composite carbon nanotube thermal interface device | Yuegang Zhang, C. Garner | 2006-10-10 |
| 7112472 | Methods of fabricating a composite carbon nanotube thermal interface device | — | 2006-09-26 |
| 7105851 | Nanotubes for integrated circuits | — | 2006-09-12 |
| 7087517 | Method to fabricate interconnect structures | Tatyana N. Andreyushchenko, Kenneth Cadien, Paul B. Fischer | 2006-08-08 |
| 7087104 | Preparation of electroless deposition solutions | Hok-Kin Choi, Vani Thirumala, Chin-Chang Cheng, Ting Zhong | 2006-08-08 |
| 7060617 | Method of protecting a seed layer for electroplating | Peter K. Moon | 2006-06-13 |
| 7049234 | Multiple stage electroless deposition of a metal layer | Chin-Chang Cheng | 2006-05-23 |
| 7008872 | Use of conductive electrolessly deposited etch stop layers, liner layers and via plugs in interconnect structures | Chin-Chang Cheng, Makarem A. Hussein, Phi L. Nguyen, Ruth A. Brain | 2006-03-07 |
| 7001782 | Method and apparatus for filling interlayer vias on ferroelectric polymer substrates | Daniel Diana, Ebrahim Andideh, Richard M. Steger, Ming Fang | 2006-02-21 |
| 7001641 | Seed layer treatment | Christopher D. Thomas, Vinay Chikarmane | 2006-02-21 |