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USPTO Patent Rankings Data through Dec 31, 2025
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Stephen Chambers — 16 Patents

Intel: 16 patents #2,596 of 30,777Top 9%
Hillsboro, OR: #273 of 2,365 inventorsTop 15%
Oregon: #2,717 of 28,073 inventorsTop 10%
Overall (All Time): #284,196 of 4,157,543Top 7%
16 Patents All Time
Stephen Chambers has been granted 16 US patents while listed as an inventor at Intel. The first was granted in 1989 and the most recent in August 2008. Stephen Chambers ranks #284,196 of 4,157,543 US inventors in our database (top 6.8%). Patent records list Stephen Chambers in Hillsboro, OR, US.

Issued Patents All Time

Showing 1–16 of 16 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
7414298 Super self-aligned collector device for mono-and hetero bipolar junction transistors, and method of making same Shahriar Ahmed, Mark Bohr, Richard Green 2008-08-19 $22,118,000
7202514 Self aligned compact bipolar junction transistor layout and method of making same Shahriar Ahmed, Mark Bohr, Richard Green, Anand S. Murthy 2007-04-10 $13,767,000
7135775 Enhancement of an interconnect Valery M. Dubin, Andrew Ott, Christine Hau-Riege 2006-11-14 $28,395,000
7064042 Self aligned compact bipolar junction transistor layout, and method of making same Shahriar Ahmed, Mark Bohr, Richard Green, Anand S. Murthy 2006-06-20 $13,743,000
7015085 Super self-aligned collector device for mono-and hetero bipolar junction transistors and method of making same Shahriar Ahmed, Mark Bohr, Richard Green 2006-03-21 $17,683,000
6846752 Methods and devices for the suppression of copper hillock formation Dan S. LAVRIC 2005-01-25 $26,797,000
6818548 Fast ramp anneal for hillock suppression in copper-containing structures Dan S. LAVRIC 2004-11-16 $29,403,000
6703685 Super self-aligned collector device for mono-and hetero bipolar junction transistors Shahriar Ahmed, Mark Bohr, Richard Green 2004-03-09 $36,606,000
6579771 Self aligned compact bipolar junction transistor layout, and method of making same Shahriar Ahmed, Mark Bohr, Richard Green, Anand S. Murthy 2003-06-17 $57,598,000
6518184 Enhancement of an interconnect Valery M. Dubin, Andrew Ott, Christine Hau-Riege 2003-02-11 $38,289,000
6124180 BiCMOS process for counter doped collector Richard Taylor 2000-09-26 $171,565,000
5856697 Integrated dual layer emitter mask and emitter trench for BiCMOS processes Brian J. Brown, Chan-Hong Chern, Robert S. Chau, Leopoldo D. Yau 1999-01-05 $155,215,000
5629547 BICMOS process for counter doped collector Richard Taylor 1997-05-13 $68,703,000
5488003 Method of making emitter trench BiCMOS using integrated dual layer emitter mask Brian J. Brown, Chan-Hong Chern, Robert S. Chau, Leopoldo D. Yau 1996-01-30 $63,723,000
5420051 Pre-poly emitter implant Mark Bohr, Richard Taylor 1995-05-30 $55,023,000
4824767 Dual glass contact process Stephen Luce 1989-04-25 $23,172,000