Issued Patents All Time
Showing 26–50 of 70 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11594524 | Fabrication and use of through silicon vias on double sided interconnect device | Brennen Mueller, Patrick Morrow, Paul B. Fischer, Daniel Pantuso | 2023-02-28 |
| 11569238 | Vertical memory cells | Aaron D. Lilak, Willy Rachmady, Gilbert Dewey, Hui Jae Yoo, Patrick Morrow +5 more | 2023-01-31 |
| 11552104 | Stacked transistors with dielectric between channels of different device strata | Aaron D. Lilak, Gilbert Dewey, Willy Rachmady, Rishabh Mehandru, Ehren Mannebach +3 more | 2023-01-10 |
| 11532719 | Transistors on heterogeneous bonding layers | Jack T. Kavalieros, Gilbert Dewey, Willy Rachmady, Aaron D. Lilak, Brennen Mueller +5 more | 2022-12-20 |
| 11482621 | Vertically stacked CMOS with upfront M0 interconnect | Willy Rachmady, Patrick Morrow, Aaron D. Lilak, Rishabh Mehandru, Cheng-Ying Huang +4 more | 2022-10-25 |
| 11430814 | Metallization structures for stacked device connectivity and their methods of fabrication | Aaron D. Lilak, Anh Phan, Patrick Morrow, Willy Rachmady, Gilbert Dewey +6 more | 2022-08-30 |
| 11393777 | Microelectronic assemblies | Adel A. Elsherbini, Patrick Morrow, Henning Braunisch, Brennen Mueller, Shawna M. Liff +2 more | 2022-07-19 |
| 11393818 | Stacked transistors with Si PMOS and high mobility thin film transistor NMOS | Gilbert Dewey, Ravi Pillarisetty, Abhishek A. Sharma, Aaron D. Lilak, Willy Rachmady +5 more | 2022-07-19 |
| 11348897 | Microelectronic assemblies | Adel A. Elsherbini, Henning Braunisch, Aleksandar Aleksov, Shawna M. Liff, Johanna M. Swan +3 more | 2022-05-31 |
| 11264493 | Wrap-around source/drain method of making contacts for backside metals | Patrick Morrow, Il-Seok Son, Donald W. Nelson | 2022-03-01 |
| 11251158 | Monolithic chip stacking using a die with double-sided interconnect layers | Anup Pancholi | 2022-02-15 |
| 11251156 | Fabrication and use of through silicon vias on double sided interconnect device | Brennen Mueller, Patrick Morrow, Paul B. Fischer, Daniel Pantuso | 2022-02-15 |
| 11244943 | Three-dimensional integrated circuits (3DICs) including bottom gate MOS transistors with monocrystalline channel material | Cheng-Ying Huang, Gilbert Dewey, Ashish Agrawal, Willy Rachmady, Zachary Geiger +5 more | 2022-02-08 |
| 11201221 | Backside contact structures and fabrication for metal on both sides of devices | Patrick Morrow, Rishabh Mehandru, Aaron D. Lilak | 2021-12-14 |
| 11121691 | Resonator structure encapsulation | Kevin Lin, Edris M. Mohammed | 2021-09-14 |
| 10896847 | Techniques for revealing a backside of an integrated circuit device, and associated configurations | Il-Seok Son, Colin T. Carver, Paul B. Fischer, Patrick Morrow | 2021-01-19 |
| 10872820 | Integrated circuit structures | Bruce A. Block, Valluri Rao, Patrick Morrow, Rishabh Mehandru, Doug B. Ingerly +3 more | 2020-12-22 |
| 10797139 | Methods of forming backside self-aligned vias and structures formed thereby | Patrick Morrow, Mauro J. Kobrinsky, Il-Seok Son, Paul B. Fischer | 2020-10-06 |
| 10784358 | Backside contact structures and fabrication for metal on both sides of devices | Patrick Morrow, Rishabh Mehandru, Aaron D. Lilak | 2020-09-22 |
| 10763248 | Multi-layer silicon/gallium nitride semiconductor | Sansaptak Dasgupta, Marko Radosavljevic, Han Wui Then, Ravi Pillarisetty, Patrick Morrow +3 more | 2020-09-01 |
| 10700039 | Silicon die with integrated high voltage devices | Donald W. Nelson, M. Clair Webb, Patrick Morrow | 2020-06-30 |
| 10658291 | Metal on both sides with clock gated-power and signal routing underneath | Donald W. Nelson, Patrick Morrow | 2020-05-19 |
| 10522510 | Heterogeneous integration of ultrathin functional block by solid phase adhesive and selective transfer | Jacob Jensen, Patrick Morrow, Paul B. Fischer | 2019-12-31 |
| 10490449 | Techniques for revealing a backside of an integrated circuit device, and associated configurations | Il-Seok Son, Colin T. Carver, Paul B. Fischer, Patrick Morrow | 2019-11-26 |
| 10453679 | Methods and devices integrating III-N transistor circuitry with Si transistor circuitry | Sansaptak Dasgupta, Marko Radosavljevic, Han Wui Then, Ravi Pillarisetty, Patrick Morrow +3 more | 2019-10-22 |