Issued Patents All Time
Showing 226–250 of 293 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6387742 | Thermal conductivity enhanced semiconductor structures and fabrication processes | Robert J. Gauthier, Jr., Dominic J. Schepis, Steven H. Voldman | 2002-05-14 |
| 6380027 | Dual tox trench dram structures and process using V-groove | Toshiharu Furukawa, Jeffrey P. Gambino, Edward W. Kiewra, Jack A. Mandelman, Carl Radens +1 more | 2002-04-30 |
| 6369606 | Mixed threshold voltage CMOS logic device and method of manufacture therefor | Russell J. Houghton, Thomas Vogelsang, Adam Wilson | 2002-04-09 |
| 6369671 | Voltage controlled transmission line with real-time adaptive control | Claude L. Bertin, Anthony R. Bonaccio, Howard L. Kalter, Thomas M. Maffitt, Jack A. Mandelman +1 more | 2002-04-09 |
| 6362056 | Method of making alternative to dual gate oxide for MOSFETs | Jack A. Mandelman | 2002-03-26 |
| 6358627 | Rolling ball connector | Joseph A. Benenati, Claude L. Bertin, William T. Chen, Thomas Edward Dinan, Wayne F. Ellis +4 more | 2002-03-19 |
| 6355531 | Method for fabricating semiconductor devices with different properties using maskless process | Jack A. Mandelman, Louis L. Hsu, Carl Radens, Li-Kong Wang | 2002-03-12 |
| 6346846 | Methods and apparatus for blowing and sensing antifuses | Claude L. Bertin, John A. Fifield, Russell J. Houghton, Nicholas M. van Heel | 2002-02-12 |
| 6345380 | Interconnected integrated circuits having reduced inductance during switching and a method of interconnecting such circuits | Anthony R. Bonaccio, Howard L. Kalter | 2002-02-05 |
| 6344383 | Structure and method for dual gate oxidation for CMOS technology | Wayne S. Berry, Jeffrey P. Gambino, Jack A. Mandelman | 2002-02-05 |
| 6345362 | Managing Vt for reduced power using a status table | Claude L. Bertin, Alvar A. Dean, Kenneth J. Goodnow, Scott Whitney Gould, Wilbur D. Pricer +1 more | 2002-02-05 |
| 6319745 | Formation of charge-coupled-device with image pick-up array | Claude L. Bertin, Jerzy M. Zalesinski | 2001-11-20 |
| 6294942 | Method and apparatus for providing self-terminating signal lines | Claude L. Bertin, Anthony R. Bonaccio, Howard L. Kalter | 2001-09-25 |
| 6288426 | Thermal conductivity enhanced semiconductor structures and fabrication processes | Robert J. Gauthier, Jr., Dominic J. Schepis, Steven H. Voldman | 2001-09-11 |
| 6281731 | Control of hysteresis characteristic within a CMOS differential receiver | John A. Fifield, Russell J. Houghton, Wilbur D. Pricer | 2001-08-28 |
| 6274467 | Dual work function gate conductors with self-aligned insulating cap | Jeffrey P. Gambino, Louis L. Hsu, Jack A. Mandelman, Carl Radens | 2001-08-14 |
| 6274441 | Method of forming bitline diffusion halo under gate conductor ledge | Jack A. Mandelman, Ramachandra Divakaruni | 2001-08-14 |
| 6271059 | Chip interconnection structure using stub terminals | Claude L. Bertin, Richard Q. Williams | 2001-08-07 |
| 6271080 | Structure and method for planar MOSFET DRAM cell free of wordline gate conductor to storage trench overlay sensitivity | Jack A. Mandelman, Toshiharu Furukawa | 2001-08-07 |
| 6268748 | Module with low leakage driver circuits and method of operation | Claude L. Bertin, John A. Fifield, Russell J. Houghton, Christopher P. Miller | 2001-07-31 |
| 6266272 | Partially non-volatile dynamic random access memory formed by a plurality of single transistor cells used as DRAM cells and EPROM cells | Toshiaki Kirihata, Daniel W. Storaska, Chandrasekhar Narayan, Claude L. Bertin, Nick van Heel | 2001-07-24 |
| 6258689 | Low resistance fill for deep trench capacitor | Gary B. Bronner, Jeffrey P. Gambino, Jack A. Mandelman, Rick L. Mohler, Carl Radens | 2001-07-10 |
| 6255208 | Selective wafer-level testing and burn-in | William E. Bernier, Claude L. Bertin, Anilkumar C. Bhatt, Michael A. Gaynes, Erik L. Hedberg +5 more | 2001-07-03 |
| 6255899 | Method and apparatus for increasing interchip communications rates | Claude L. Bertin, Anthony R. Bonaccio, Erik L. Hedberg, Howard L. Kalter, Thomas M. Maffitt +2 more | 2001-07-03 |
| 6255694 | Multi-function semiconductor structure and method | Jack A. Mandelman, Edward J. Nowak | 2001-07-03 |