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Alvar A. Dean

IBM: 33 patents #2,996 of 70,183Top 5%
CI Cisco: 2 patents #5,498 of 13,007Top 45%
Overall (All Time): #99,184 of 4,157,543Top 3%
35
Patents All Time

Issued Patents All Time

Showing 25 most recent of 35 patents

Patent #TitleCo-InventorsDate
8457156 Wideband cable system John T. Chapman, Richard J. Santarpio, John P. Prokopik, Michael James Healy 2013-06-04
7782898 Wideband cable system John T. Chapman, Richard J. Santarpio, John P. Prokopik, Michael James Healy 2010-08-24
7478280 Test system for integrated circuits Sebastian T. Ventrone 2009-01-13
7469395 Wiring optimizations for power John M. Cohn, Amir Farrahi, David J. Hathaway, Thomas Lepsic, Jagannathan Narasimhan +2 more 2008-12-23
7350108 Test system for integrated circuits Sebastian T. Ventrone 2008-03-25
7346875 Wiring optimizations for power John M. Cohn, Amir Farrahi, David J. Hathaway, Thomas Lepsic, Jagannathan Narasimhan +2 more 2008-03-18
7135907 Clock signal distribution utilizing differential sinusoidal signal pair Anthony R. Bonaccio, John M. Cohn, Amir Farrahi, David J. Hathaway, Sebastian T. Ventrone 2006-11-14
7071757 Clock signal distribution utilizing differential sinusoidal signal pair Anthony R. Bonaccio, John M. Cohn, Amir Farrahi, David J. Hathaway, Sebastian T. Ventrone 2006-07-04
6985004 Wiring optimizations for power John M. Cohn, Amir Farrahi, David J. Hathaway, Thomas Lepsic, Jagannathan Narasimhan +2 more 2006-01-10
6802033 Low-power critical error rate communications controller Claude L. Bertin, Kenneth J. Goodnow, Scott Whitney Gould, Patrick E. Perry, Wilbur D. Pricer +1 more 2004-10-05
6792582 Concurrent logical and physical construction of voltage islands for mixed supply voltage designs John M. Cohn, David J. Hathaway, David E. Lackey, Thomas Lepsic, Susan K. Lichtensteiger +2 more 2004-09-14
6711719 Method and apparatus for reducing power consumption in VLSI circuit designs John M. Cohn, Amir Farrahi, David J. Hathaway, Thomas Lepsic, Patrick E. Perry +2 more 2004-03-23
6687883 System and method for inserting leakage reduction control in logic circuits John M. Cohn, David J. Hathaway, Sebastian T. Ventrone 2004-02-03
6636995 Method of automatic latch insertion for testing application specific integrated circuits Joseph A. Iadanza, David E. Lackey, Sebastian T. Ventrone 2003-10-21
6609228 Latch clustering for power optimization Paul H. Bergeron, Keith M. Carrig, Roger P. Gregor, David J. Hathaway, David E. Lackey +2 more 2003-08-19
6604174 Performance based system and method for dynamic allocation of a unified multiport cache Kenneth J. Goodnow, Stephen W. Mahin, Wilbur D. Pricer, Dana J. Thygesen, Sebastian T. Ventrone 2003-08-05
6535016 Method and circuit for providing copy protection in an application-specific integrated circuit Charles N. Choukalos, Scott A. Tetreault, Sebastian T. Ventrone 2003-03-18
6532520 Method and apparatus for allocating data and instructions within a shared cache Marc R. Faucher, John W. Goetz, Kenneth J. Goodnow, Paul Gutwin, Stephen W. Mahin +1 more 2003-03-11
6487701 System and method for AC performance tuning by thereshold voltage shifting in tubbed semiconductor technology Jerry D. Hayes, Joseph A. Iadanza, Emory D. Keller, Sebastian T. Ventrone 2002-11-26
6479974 Stacked voltage rails for low-voltage DC distribution John M. Cohn, David J. Hathaway, Patrick E. Perry, Sebastian T. Ventrone 2002-11-12
6477654 Managing VT for reduced power using power setting commands in the instruction stream Patrick E. Perry, Sebastian T. Ventrone 2002-11-05
6434704 Methods for improving the efficiency of clock gating within low power clock trees David Garrett, Mircea R. Stan 2002-08-13
6433618 Variable power device with selective threshold control Claude L. Bertin, William R. Tonti 2002-08-13
6425109 High level automatic core configuration Charles N. Choukalos, Scott A. Tetreault, Sebastian T. Ventrone 2002-07-23
6397170 Simulation based power optimization Kenneth J. Goodnow, Scott Whitney Gould, Sebastian T. Ventrone 2002-05-28