Issued Patents All Time
Showing 25 most recent of 32 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10794952 | Product performance test binning | Jeanne P. Bickford, Theodoros E. Anemikos, Nazmul Habib | 2020-10-06 |
| 10295592 | Pre-test power-optimized bin reassignment following selective voltage binning | Igor Arsovski, Jeanne P. Bickford, Paul J. Grzymkowski, Robert McMahon, Troy J. Perry +2 more | 2019-05-21 |
| 10067184 | Product performance test binning | Theodoros E. Anemikos, Jeanne P. Bickford, Nazmul Habib | 2018-09-04 |
| 9865486 | Timing/power risk optimized selective voltage binning using non-linear voltage slope | Igor Arsovski, Jeanne P. Bickford, Mark W. Kuemerle, Jeanne H. Raymond | 2018-01-09 |
| 9772374 | Selective voltage binning leakage screen | Jeanne P. Bickford, Kevin K. Dezfulian, Jeanne H. Raymond | 2017-09-26 |
| 9759767 | Pre-test power-optimized bin reassignment following selective voltage binning | Igor Arsovski, Jeanne P. Bickford, Paul J. Grzymkowski, Robert McMahon, Troy J. Perry +2 more | 2017-09-12 |
| 9619609 | Integrated circuit chip design methods and systems using process window-aware timing analysis | Jeanne P. Bickford, Eric A. Foreman, Mark W. Kuemerle, Jeffrey G. Hemmett | 2017-04-11 |
| 9552447 | Systems and methods for controlling integrated circuit chip temperature using timing closure-based adaptive frequency scaling | Jeanne P. Bickford, Eric A. Foreman, Mark W. Kuemerle | 2017-01-24 |
| 9269407 | System and method for managing circuit performance and power consumption by selectively adjusting supply voltage over time | Jeanne P. Bickford, Eric A. Foreman, Mark W. Kuemerle | 2016-02-23 |
| 9152168 | Systems and methods for system power estimation | Jeanne P. Bickford, Rebecca A. Bickford, Jeanne H. Raymond | 2015-10-06 |
| 8963620 | Controlling circuit voltage and frequency based upon location-dependent temperature | Jeanne P. Bickford, Eric A. Foreman, David J. Hathaway, Mark W. Kuemerle | 2015-02-24 |
| 8843874 | Power and timing optimization for an integrated circuit by voltage modification across various ranges of temperatures | Jeanne P. Bickford, Eric A. Foreman, Mark W. Kuemerle | 2014-09-23 |
| 8839165 | Power/performance optimization through continuously variable temperature-based voltage control | Jeanne P. Bickford, Eric A. Foreman, Mark W. Kuemerle | 2014-09-16 |
| 8839170 | Power/performance optimization through temperature/voltage control | Jeanne P. Bickford, Eric A. Foreman, Mark W. Kuemerle | 2014-09-16 |
| 8543960 | Power and timing optimization for an integrated circuit by voltage modification across various ranges of temperatures | Jeanne P. Bickford, Eric A. Foreman, Mark W. Kuemerle | 2013-09-24 |
| 8499140 | Dynamically adjusting pipelined data paths for improved power management | Pascal A. Nsame, Sebastian T. Ventrone | 2013-07-30 |
| 8421495 | Speed binning for dynamic and adaptive power control | Theodoros E. Anemikos, Jeanne P. Bickford, Nazmul Habib | 2013-04-16 |
| 8239791 | Method of designing multi-state restore circuitry for restoring state to a power managed functional block | Michael R. Ouellette, Raymond Schuppe, Sebastian T. Ventrone | 2012-08-07 |
| 8141012 | Timing closure on multiple selective corners in a single statistical timing run | Nathan C. Buck, Brian M. Dreibelbis, John P. Dubuque, Eric A. Foreman, Peter A. Habitz +4 more | 2012-03-20 |
| 8086988 | Chip design and fabrication method optimized for profit | Nathan C. Buck, Howard H. Chen, James Eckhardt, Eric A. Foreman, James C. Gregerson +3 more | 2011-12-27 |
| 8086832 | Structure for dynamically adjusting pipelined data paths for improved power management | Pascal A. Nsame, Sebastian T. Ventrone | 2011-12-27 |
| 8020138 | Voltage island performance/leakage screen monitor for IP characterization | Bruce Balch, Nazmul Habib, Daniel Stasiak, Richard A. Wachnik | 2011-09-13 |
| 7917451 | Methods, apparatus, and program products to optimize semiconductor product yield prediction for performance and leakage screens | Thomas S. Barnett, Jeanne P. Bickford, Nazmul Habib, Raymond J. Rosner | 2011-03-29 |
| 7877714 | System and method to optimize semiconductor power by integration of physical design timing and product performance measurements | Theodoros E. Anemikos, Jeanne P. Spence Bickford, Laura S. Chadwick, Anthony D. Polson | 2011-01-25 |
| 7821294 | Integrated circuit containing multi-state restore circuitry for restoring state to a power-managed functional block | Michael R. Ouellette, Raymond Schuppe, Sebastian T. Ventrone | 2010-10-26 |