Issued Patents All Time
Showing 25 most recent of 33 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10891412 | Offline analysis of hierarchical electronic design automation derived data | SheshaShayee K. Raghunathan, Thomas S. Guzowski, Kerim Kalafala, Jack DiLullo, Debra Dean | 2021-01-12 |
| 10489540 | Integrating manufacturing feedback into integrated circuit structure design | Brian M. Dreibelbis, John P. Dubuque, Eric A. Foreman, Peter A. Habitz, Jeffrey G. Hemmett +4 more | 2019-11-26 |
| 10380289 | Multi-sided variations for creating integrated circuits | Robert J. Allen, Eric A. Foreman, Jeffrey G. Hemmett, Kerim Kalafala, Gregory M. Schaeffer +4 more | 2019-08-13 |
| 10380286 | Multi-sided variations for creating integrated circuits | Robert J. Allen, Eric A. Foreman, Jeffrey G. Hemmett, Kerim Kalafala, Gregory M. Schaeffer +4 more | 2019-08-13 |
| 10372851 | Independently projecting a canonical clock | Sean Michael Carey, Peter C. Elmendorf, Eric A. Foreman, Jeffrey G. Hemmett, Lyle Jackson +3 more | 2019-08-06 |
| 10346569 | Multi-sided variations for creating integrated circuits | Robert J. Allen, Eric A. Foreman, Jeffrey G. Hemmett, Kerim Kalafala, Gregory M. Schaeffer +4 more | 2019-07-09 |
| 10289776 | Sensitivity calculation filtering for statistical static timing analysis of an integrated circuit | Eric A. Foreman, Jeffrey G. Hemmett, Kerim Kalafala, Gregory M. Schaeffer, Stephen G. Shuma +3 more | 2019-05-14 |
| 10031985 | Sensitivity calculation filtering for statistical static timing analysis of an integrated circuit | Eric A. Foreman, Jeffrey G. Hemmett, Kerim Kalafala, Gregory M. Schaeffer, Stephen G. Shuma +3 more | 2018-07-24 |
| 9858368 | Integrating manufacturing feedback into integrated circuit structure design | Brian M. Dreibelbis, John P. Dubuque, Eric A. Foreman, Peter A. Habitz, Jeffrey G. Hemmett +4 more | 2018-01-02 |
| 9767239 | Timing optimization driven by statistical sensitivites | Eric A. Foreman, Jeffrey G. Hemmett, Kerim Kalafala, Gregory M. Schaeffer, Stephen G. Shuma +3 more | 2017-09-19 |
| 9519747 | Dynamic and adaptive timing sensitivity during static timing analysis using look-up table | Brian M. Dreibelbis, John P. Dubuque, Eric A. Foreman, David J. Hathaway, Jeffrey G. Hemmett +6 more | 2016-12-13 |
| 9495497 | Dynamic voltage frequency scaling | Eric A. Foreman, Jeffrey G. Hemmett, Kerim Kalafala, Gregory M. Schaeffer, Stephen G. Shuma +4 more | 2016-11-15 |
| 9378328 | Modeling multi-patterning variability with statistical timing | Brian M. Dreibelbis, John P. Dubuque, Eric A. Foreman, Peter A. Habitz, David J. Hathaway +4 more | 2016-06-28 |
| 9348962 | Hierarchical design of integrated circuits with multi-patterning requirements | Brian M. Dreibelbis, John P. Dubuque, Eric A. Foreman, David J. Hathaway, Jeffrey G. Hemmett +3 more | 2016-05-24 |
| 9171124 | Parasitic extraction in an integrated circuit with multi-patterning requirements | Brian M. Dreibelbis, John P. Dubuque, Eric A. Foreman, Peter A. Habitz, David J. Hathaway +4 more | 2015-10-27 |
| 8949765 | Modeling multi-patterning variability with statistical timing | Brian M. Dreibelbis, John P. Dubuque, Eric A. Foreman, Peter A. Habitz, David J. Hathaway +4 more | 2015-02-03 |
| 8850378 | Hierarchical design of integrated circuits with multi-patterning requirements | Brian M. Dreibelbis, John P. Dubuque, Eric A. Foreman, Peter A. Habitz, David J. Hathaway +4 more | 2014-09-30 |
| 8806402 | Modeling multi-patterning variability with statistical timing | Brian M. Dreibelbis, John P. Dubuque, Eric A. Foreman, Peter A. Habitz, David J. Hathaway +4 more | 2014-08-12 |
| 8768679 | System and method for efficient modeling of NPskew effects on static timing tests | Brian M. Dreibelbis, John P. Dubuque, Eric A. Foreman, Peter A. Habitz, Jeffrey G. Hemmett +3 more | 2014-07-01 |
| 8769452 | Parasitic extraction in an integrated circuit with multi-patterning requirements | Brian M. Dreibelbis, John P. Dubuque, Eric A. Foreman, Peter A. Habitz, David J. Hathaway +4 more | 2014-07-01 |
| 8656207 | Method for modeling variation in a feedback loop of a phase-locked loop | Brian M. Dreibelbis, John P. Dubuque, Eric A. Foreman, Peter A. Habitz | 2014-02-18 |
| 8560989 | Statistical clock cycle computation | Brian M. Dreibelbis, John P. Dubuque, Eric A. Foreman, James C. Gregerson, Peter A. Habitz +6 more | 2013-10-15 |
| 8468483 | Method, system and program storage device for performing a parameterized statistical static timing analysis (SSTA) of an integrated circuit taking into account setup and hold margin interdependence | Brian M. Dreibelbis, John P. Dubuque, Eric A. Foreman, Peter A. Habitz, Jeffrey G. Hemmett +4 more | 2013-06-18 |
| 8141012 | Timing closure on multiple selective corners in a single statistical timing run | Brian M. Dreibelbis, John P. Dubuque, Eric A. Foreman, Peter A. Habitz, Jeffrey G. Hemmett +4 more | 2012-03-20 |
| 8086988 | Chip design and fabrication method optimized for profit | Howard H. Chen, James Eckhardt, Eric A. Foreman, James C. Gregerson, Peter A. Habitz +3 more | 2011-12-27 |