Issued Patents All Time
Showing 25 most recent of 119 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11295829 | Built-in self-test (BIST) engine configured to store a per pattern based fail status in a pattern mask register | Aravindan J. Busi, John R. Goss, Paul J. Grzymkowski, Krishnendu Mondal, Kiran K. Narayan +1 more | 2022-04-05 |
| 10971243 | Built-in self-test (BIST) engine configured to store a per pattern based fail status in a pattern mask register | Aravindan J. Busi, John R. Goss, Paul J. Grzymkowski, Krishnendu Mondal, Kiran K. Narayan +1 more | 2021-04-06 |
| 10692584 | Built-in self-test (BIST) engine configured to store a per pattern based fail status in a pattern mask register | Aravindan J. Busi, John R. Goss, Paul J. Grzymkowski, Krishnendu Mondal, Kiran K. Narayan +1 more | 2020-06-23 |
| 10628375 | Method and system for enumerating digital circuits in a system-on-a-chip (SOC) | Thomas Chadwick, Nancy H. Pratt | 2020-04-21 |
| 10628376 | Method and system for enumerating digital circuits in a system-on-a-chip (SOC) | Thomas Chadwick, Nancy H. Pratt | 2020-04-21 |
| 10622090 | Arbitration for memory diagnostics | Aravindan J. Busi, Kevin W. Gorman, Deepak I. Hanagandi, Kiran K. Narayan | 2020-04-14 |
| 10553302 | Built-in self-test (BIST) engine configured to store a per pattern based fail status in a pattern mask register | Aravindan J. Busi, John R. Goss, Paul J. Grzymkowski, Krishnendu Mondal, Kiran K. Narayan +1 more | 2020-02-04 |
| 10490296 | Memory built-in self-test (MBIST) test time reduction | Deepak I. Hanagandi, Aravindan J. Busi, Kiran K. Narayan, Michael A. Ziegerhofer | 2019-11-26 |
| 10423570 | Method and system for enumerating digital circuits in a system-on-a-chip (SOC) | Thomas Chadwick, Nancy H. Pratt | 2019-09-24 |
| 10394752 | Method and system for enumerating digital circuits in a system-on-a-chip (SOC) | Thomas Chadwick, Nancy H. Pratt | 2019-08-27 |
| 10153055 | Arbitration for memory diagnostics | Aravindan J. Busi, Kevin W. Gorman, Deepak I. Hanagandi, Kiran K. Narayan | 2018-12-11 |
| 10014074 | Failure analysis and repair register sharing for memory BIST | Krishnendu Mondal, Deepak I. Hanagandi, Valerie H. Chickanosky | 2018-07-03 |
| 9881694 | Built-in-self-test (BIST) engine configured to store a per pattern based fail status in a pattern mask register | Aravindan J. Busi, John R. Goss, Paul J. Grzymkowski, Krishnendu Mondal, Kiran K. Narayan +1 more | 2018-01-30 |
| 9859019 | Programmable counter to control memory built in self-test | Deepak I. Hanagandi, Krishnendu Mondal, Kiran K. Narayan, Michael A. Ziegerhofer | 2018-01-02 |
| 9773570 | Built-in-self-test (BIST) test time reduction | Kevin W. Gorman, Deepak I. Hanagandi, Krishnendu Mondal | 2017-09-26 |
| 9761329 | Built-in self-test (BIST) circuit and associated BIST method for embedded memories | Aravindan J. Busi, Deepak I. Hanagandi, Krishnendu Mondal | 2017-09-12 |
| 9734920 | Memory test with in-line error correction code logic to test memory data and test the error correction code logic surrounding the memories | Kevin W. Gorman, Patrick E. Perry | 2017-08-15 |
| 9715942 | Built-in self-test (BIST) circuit and associated BIST method for embedded memories | Aravindan J. Busi, Deepak I. Hanagandi, Krishnendu Mondal | 2017-07-25 |
| 9672185 | Method and system for enumerating digital circuits in a system-on-a-chip (SOC) | Thomas Chadwick, Nancy H. Pratt | 2017-06-06 |
| 9514844 | Fast auto shift of failing memory diagnostics data using pattern detection | Aravindan J. Busi, Kevin W. Gorman, Kiran K. Narayan | 2016-12-06 |
| 9460811 | Read only memory (ROM) with redundancy | George M. Braceras, Albert M. Chu, Kevin W. Gorman, Ronald A. Piro, Daryl M. Seitzer +2 more | 2016-10-04 |
| 9286181 | Apparatus for capturing results of memory testing | Craig M. Monroe, Douglas E. Sprague, Michael A. Ziegerhofer | 2016-03-15 |
| 9224503 | Memory test with in-line error correction code logic | Kevin W. Gorman, Patrick E. Perry | 2015-12-29 |
| 9172373 | Verifying partial good voltage island structures | Kevin W. Gorman, Steven F. Oakland, Steven J. Urish | 2015-10-27 |
| 8935586 | Staggered start of BIST controllers and BIST engines | Valarie H. Chickanosky, Kevin W. Gorman, Suzanne Granato, Nancy H. Pratt, Michael A. Ziegerhofer | 2015-01-13 |