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2020-04-21 |
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Method and system for enumerating digital circuits in a system-on-a-chip (SOC) |
Thomas Chadwick, Michael R. Ouellette |
2020-04-21 |
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Method and system for enumerating digital circuits in a system-on-a-chip (SOC) |
Thomas Chadwick, Michael R. Ouellette |
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Method and system for enumerating digital circuits in a system-on-a-chip (SOC) |
Thomas Chadwick, Michael R. Ouellette |
2019-08-27 |
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Memory built-in self test system |
Kevin W. Gorman, Thomas Chadwick |
2018-04-17 |
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Diagnostics for a memory device |
Thomas Chadwick, Kevin W. Gorman |
2018-01-09 |
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Kevin W. Gorman, Thomas Chadwick |
2017-10-24 |
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Method and system for enumerating digital circuits in a system-on-a-chip (SOC) |
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2017-06-06 |
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Staggered start of BIST controllers and BIST engines |
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Structures including circuits for noise reduction in digital systems |
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2011-10-11 |
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Supervisory operating system for running multiple child operating systems simultaneously and optimizing resource usage |
Laura Miller, Sebastian T. Ventrone |
2011-01-18 |
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High bandwidth low-latency semaphore mapped protocol (SMP) for multi-core systems on chips |
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2010-07-27 |
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Noise reduction in digital systems when the noise is caused by simultaneously clocking data registers |
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2008-12-09 |
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Noise reduction in digital systems |
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2008-01-08 |
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Auto-linking of function logic state with testcase regression list |
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2005-08-23 |
