Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7454735 | ASIC clock floor planning method and structure | Geetha Arthanari, Mark R. Lasher, Daniel R. Menard | 2008-11-18 |
| 6609228 | Latch clustering for power optimization | Paul H. Bergeron, Alvar A. Dean, Roger P. Gregor, David J. Hathaway, David E. Lackey +2 more | 2003-08-19 |
| 6204713 | Method and apparatus for routing low-skew clock networks | Janice M. Adams, Roger P. Gregor, Daniel R. Menard | 2001-03-20 |
| 5339253 | Method and apparatus for making a skew-controlled signal distribution network | David J. Hathaway, Keith W. Lallier, Jeannie Therese Harrigan Panner, Terrence William Sehr | 1994-08-16 |